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A semiconductor structure and method to isolate one first circuit and one second circuit

A semiconductor and circuit technology, applied in the field of integrated circuit design, can solve the problems of occupying IC chips, not well done, large area, etc., and achieve the effect of preventing punch-through effect

Active Publication Date: 2009-01-14
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the isolation is not done well, a punch through event can also occur because the depletion region of one device extends and connects to the depletion region of another device
[0004] Although an isolated structure for an operating voltage component can eliminate or reduce the above-mentioned problems, such a structure generally occupies a very large area on the IC chip

Method used

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  • A semiconductor structure and method to isolate one first circuit and one second circuit
  • A semiconductor structure and method to isolate one first circuit and one second circuit
  • A semiconductor structure and method to isolate one first circuit and one second circuit

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Embodiment Construction

[0018] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and understandable, a preferred embodiment is specifically cited below, and is described in detail in conjunction with the accompanying drawings as follows:

[0019] FIG. 1 shows a conventional isolation structure 100 in which isolation rings are used to isolate devices operating at different voltages. Such isolation rings are necessary because the operating voltage of one component may affect adjacent components operating at a different voltage. The backside of the IC chip is usually connected to a bias voltage, and this bias voltage may affect the Vt of the MOS transistor. Therefore, components operating at different voltages cannot be placed on the same chip unless the back bias voltage can be properly isolated.

[0020] On the P-type semiconductor substrate 110 , there is an N-type buried layer 102 in the area of ​​a low voltage circuit 104 , and another N-t...

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Abstract

The related semiconductor structure comprises a first isolation ring encircled two circuits and arranged on a substrate, an embedded layer on semiconductor substrate to extend to area of two circuits and contact with the ring to isolate two circuits from the back bias of substrate, and an ion implantation reinforced layer arranged between the trap area of circuits and the embedded layer. Wherein, the conductive polarity of adulterant in last layer is opposite to the adulterant in embedded layer to prevent penetration between circuit and embedded layer.

Description

technical field [0001] The present invention generally relates to integrated circuit (IC) design, and more particularly to methods and structures for placing components operating at different voltages in the same isolated architecture. Background technique [0002] For a system on chip (SOC), such as a driving IC chip of a liquid crystal display, different circuits may operate at different voltages, and it is necessary to isolate such circuits from each other. If not well isolated, the operating voltage of one component may affect another adjacent component operating at a different voltage. In addition, for a metal-oxide-semiconductor (MOS) transistor, the voltage of its body (body) will affect its threshold voltage (threshold voltage, Vt). The back of the semiconductor chip provides a back bias voltage for the substrate of the MOS. Once the substrate voltage changes, the electron concentration in the inversion layer (inversion layer) under the MOS gate will change accordin...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/02H01L21/82H01L21/76
Inventor 刘家玮刘俊秀张启宣宋自强陈忠义叶任贤
Owner TAIWAN SEMICON MFG CO LTD