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Circuit board, circuit board mounting method, and electronic device using the circuit board

A technology for circuit substrates and mounting methods, which is applied in the direction of circuits, printed circuit components, and printed circuits assembled with electrical components, and can solve problems such as the connection cannot be maintained, the reliability of electronic equipment is reduced, and the bonding area is reduced.

Inactive Publication Date: 2009-04-15
NEC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] And at this time, if external forces such as bending are applied to the circuit board 1 or the surface mount component 6, peeling will occur on the melting portion of the above-mentioned ternary alloy layer, that is, between the lead wire 5 and the solder 8 of the surface mount component 6, or Peeling occurs between the solder pad 7 of the circuit board 1 and the solder 8, and the connection between the solder pad 7 of the circuit board 1 and the lead 5 of the surface mount component 6 cannot be maintained.
In addition, even in the case of peeling off only a part of the fusion portion, there is a problem that the reliability of the electronic device is significantly lowered due to the reduction of the bonding area.

Method used

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  • Circuit board, circuit board mounting method, and electronic device using the circuit board
  • Circuit board, circuit board mounting method, and electronic device using the circuit board
  • Circuit board, circuit board mounting method, and electronic device using the circuit board

Examples

Experimental program
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Effect test

Embodiment approach 1

[0072] Such as Figure 5 to Figure 12 As shown, in the circuit board according to the first embodiment of the present invention, at least one of the inner wall of the via hole formed on the circuit board, the pad of the via hole, or the member filled in the via hole is formed using a material having a predetermined thermal conductivity or lower. One is to suppress the conduction of heat transmitted through the through hole during flow mounting. Since a material with low thermal conductivity is arranged on the heat conduction path, heat conduction on the wiring and flow into the solder of the lead bonding portion of the surface mount component can be suppressed. Melting of the alloy layer formed on the wire bonding portion is prevented.

[0073] Here, although the thermal conductivity of the inner wall of the through hole, the pad, or the material filled into the through hole is as low as possible, a metal with good electrical conductivity must be selected. The results of compr...

Embodiment approach 2

[0075] Such as Figure 13 to Figure 26 As shown, the second embodiment of the present invention is formed by using a material with a predetermined thermal conductivity or less, or setting the length of the wiring to a predetermined value or more, or setting the cross-sectional area of ​​the wiring to a predetermined value or less. At least a part of the wiring between the through hole formed on the circuit board and the solder pad of the wire bonding of the surface mount component suppresses the conduction of heat conducted through the through hole during flow mounting, and suppresses the conduction on the wiring and flows into the surface mount component. The heat in the solder of the wire bond prevents the melting of the alloy layer formed on the wire bond.

[0076] Here, the thermal conductivity of the wiring is the same as that of the first embodiment, preferably not more than 100 W / m·K. In addition, according to the experiments of the inventors, if the wiring length is gr...

Embodiment approach 3

[0078] Such as Figure 27 to Figure 30 As shown, the third embodiment of the present invention adopts a method of providing a region where no inner layer close-packed pattern is formed on at least a part of the surface mount component mounting region of the multilayer wiring board, and suppresses crossing of the multilayer wiring during flow mounting. The conduction of the heat conducted by the substrate suppresses the heat conducted inside the multilayer wiring board and flows into the solder of the wire bonding portion of the surface mount component, and prevents the alloy layer formed on the wire bonding portion from melting. In addition, specific structures will be described in detail in the nineteenth to twenty-first embodiments.

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PUM

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Abstract

A through hole 2a in a circuit board 1 and to be joined to a lead 5 in a surface mounting component 6 is prepared from a material such as nickel, and palladium having a thermal conductivity equal to or less than 100 W / m.K, the circuit board 1 involving a alloy layer composed of at least a member selected from elements of solder 8, a pad 7, and the lead 5 in a solder joined site of the lead 5 and the pad 7, whereby a quantity of heat transmitted to the joined site via the through hole 2a is reduced at the time when wave-soldering is applied to the back of the circuit board 1 after the surface mounting component 6 was mounted, so that the joined site is maintained at a temperature equal to or less than a melting point of the alloy layer, and hence, exfoliation in an interface of the joined site is prevented, and reliability in the joint of the lead 5 and the pad 7 is elevated.

Description

technical field [0001] The present invention relates to a circuit substrate, a mounting method of the circuit substrate, and electronic equipment using the circuit substrate. In particular, it relates to a circuit board for compositely mounting surface mount type electronic components and plug-in type electronic components using lead-free solder, a method for mounting the circuit board, and electronic equipment using the circuit board. Background technique [0002] So far, many of the mounting substrates are surface mount electronic components and plug-in electronic components mounted on circuit substrates. Refer to Figure 1 to Figure 4 The structure of a mounting board using a conventional circuit board and its manufacturing method will be described in detail. figure 1 It is a plan view showing a state in which a surface mount component 6 is mounted on a circuit board 1 on which a through hole 2 is formed, figure 2 yes figure 1 Enlarged plan view of part C in, image...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H05K3/34H05K13/00H05K1/02
CPCH01L2924/0002
Inventor 百川裕希河野英一齐藤优田边一彦
Owner NEC CORP