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Semiconductor package structure and package method

A packaging method and semiconductor technology, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problems of chip and chip carrier lamination, chip warpage, cracking, etc., to improve the chip Warping or even cracking effect

Active Publication Date: 2009-06-24
ADVANCED SEMICON ENG INC
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Problems solved by technology

[0006] The object of the present invention is to provide a semiconductor packaging structure and packaging method for a tire pressure monitoring system, so as to overcome or at least improve the occurrence of delamination between the chip and the chip holder in the above-mentioned prior art or chip warping or even crack the problem

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  • Semiconductor package structure and package method
  • Semiconductor package structure and package method
  • Semiconductor package structure and package method

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Embodiment Construction

[0014] Relevant detailed description and technical contents of the present invention are as follows now in conjunction with the accompanying drawings:

[0015] Figure 1-3 Shown is a semiconductor package structure 100 according to a preferred embodiment of the present invention. figure 1 A top view of the semiconductor package structure 100 is shown. figure 2 shown along figure 1 The sectional view obtained by the section line in 2-2. image 3 shown along figure 1 The sectional view obtained by the section line in 3-3. Such as figure 1 As shown, the semiconductor package structure 100 mainly includes a lead frame 110, a first semiconductor chip 120 wrapped in a first encapsulant 130 (the first encapsulant 130 has a recess 132 for accommodating a first Two semiconductor chips 140, and a cover 150 disposed on the recess 132 of the first sealant 130 (see figure 2 as well as image 3 ). For example, the first semiconductor chip 120 can be a discrete component, an integ...

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Abstract

This invention relates to a semiconductor package structure including a lead frame, a first semiconductor chip wrapped in a first sealing colloid (such as ASIC), which includes a concave for containing a second semiconductor chip ( such as a pressure sensing chip) and a cover set on the concave of the first sealing colloid, a part of which is formed between the second semiconductor chip and the loader of the chip so that the second semiconductor chip is not set on the snug of the chip but on the place of the first sealing colloid.

Description

technical field [0001] The invention relates to a semiconductor packaging structure, in particular to a semiconductor packaging structure with a plurality of semiconductor chips and a packaging method thereof. Background technique [0002] With the ever-increasing demand for miniaturization and high operating speed, a semiconductor package structure with a plurality of semiconductor chips (ie, a multi-chip package structure) is becoming more and more attractive in many electronic devices. Multi-chip package construction minimizes the limitation on system operating speed caused by long printed circuit board connection lines by combining processor, memory and logic chips in a single package construction. In addition, the multi-chip package structure can reduce the length of the connection lines between chips and reduce signal delay and access time. [0003] However, in some applications (such as a tire pressure monitoring system used to monitor automobile tire pressure), it i...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L25/00H01L23/31H01L23/488H01L21/50H01L21/56H01L21/60B81B7/00B81C3/00
CPCH01L2224/48091H01L2224/48247
Inventor 郑大训李锡元朴善裴
Owner ADVANCED SEMICON ENG INC
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