Semiconductor package structure and package method
A packaging method and semiconductor technology, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problems of chip and chip carrier lamination, chip warpage, cracking, etc., to improve the chip Warping or even cracking effect
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[0014] Relevant detailed description and technical contents of the present invention are as follows now in conjunction with the accompanying drawings:
[0015] Figure 1-3 Shown is a semiconductor package structure 100 according to a preferred embodiment of the present invention. figure 1 A top view of the semiconductor package structure 100 is shown. figure 2 shown along figure 1 The sectional view obtained by the section line in 2-2. image 3 shown along figure 1 The sectional view obtained by the section line in 3-3. Such as figure 1 As shown, the semiconductor package structure 100 mainly includes a lead frame 110, a first semiconductor chip 120 wrapped in a first encapsulant 130 (the first encapsulant 130 has a recess 132 for accommodating a first Two semiconductor chips 140, and a cover 150 disposed on the recess 132 of the first sealant 130 (see figure 2 as well as image 3 ). For example, the first semiconductor chip 120 can be a discrete component, an integ...
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