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Method to minimize wet etch undercuts and provide pore sealing of extreme low k (k<2.5) dielectrics

A dielectric and substrate technology, applied in the manufacture of circuits, electrical components, semiconductor/solid-state devices, etc.

Inactive Publication Date: 2009-10-14
APPLIED MATERIALS INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Diffusion of barrier precursors into porous low-k films contributes to leakage currents in devices

Method used

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  • Method to minimize wet etch undercuts and provide pore sealing of extreme low k (k&lt;2.5) dielectrics
  • Method to minimize wet etch undercuts and provide pore sealing of extreme low k (k&lt;2.5) dielectrics
  • Method to minimize wet etch undercuts and provide pore sealing of extreme low k (k&lt;2.5) dielectrics

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Embodiment Construction

[0018] Embodiments of the present invention provide a method of depositing a thin, conformal layer comprising silicon, carbon, and optionally oxygen and / or nitrogen on a patterned substrate. In one aspect, embodiments of the present invention provide a method of protecting a patterned low dielectric constant film after the photoresist used to pattern the low dielectric constant film is removed from the film. In other aspects, embodiments of the present invention provide a method for controlling the critical dimensions of interconnected metal lines and a method for controlling the thickness of deposited layers to about to about method in between.

[0019] In one embodiment, a low dielectric constant film is patterned on the substrate using photoresist and photolithography techniques to form vertical interconnection holes or horizontal interconnection holes therein. The low dielectric constant film may be a film containing silicon, carbon, and optionally oxygen and / or nitrog...

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Abstract

A method of minimizing wet etch undercuts and providing pore sealing of extreme low K(K<2.5) dielectrics is provided to deposit a thin, conformal pore-sealing surface layer on a low dielectric constant film on a substrate in a chamber, wherein the deposited layer recovers the surface carbon concentration of the low dielectric constant film after ashing and provides a hydrophobic surface for the patterned low dielectric constant film. A method of processing a film(102) on a substrate(100) in a chamber comprises the steps of: treating the film by selectively depositing a thin layer(108) with a thickness in a range of 4 to 100 Å and containing silicon, carbon, and selectively hydrogen or nitrogen, on an oxygen-rich or nitrogen-rich surface of the film, wherein the deposition of a thin film generates reacting of a precursor containing Si, C, and H on RF power.

Description

technical field [0001] Embodiments of the invention generally relate to the fabrication of integrated circuits. More specifically, embodiments of the present invention relate to a process for depositing a thin layer comprising silicon, carbon, and optionally oxygen and / or nitrogen on a low dielectric constant layer. Background technique [0002] The dimensions of integrated circuit geometries have shrunk dramatically since integrated circuit devices were first invented decades ago. Since then, integrated circuits have generally obeyed the two-year size halving rule (commonly known as Moore's Law), which means that the number of devices on a chip doubles every two years. Current manufacturing equipment routinely produces devices with 0.13 μm or even 0.1 μm feature sizes, and future equipment will soon be able to produce devices with even smaller feature sizes. [0003] The ever-shrinking device geometries have created a need for interlayers with lower dielectric constant (k...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/31
CPCH01L21/02052H01L21/02274H01L21/31111H01L21/76831
Inventor 徐惠文石美仪夏立群阿米尔·阿尔-巴亚提德里克·威蒂希姆·M·萨德
Owner APPLIED MATERIALS INC