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Semiconductor device with a bipolar transistor and method of manufacturing such a device

A technology of bipolar transistors and semiconductors, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc.

Active Publication Date: 2010-01-20
NXP BV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantage of the known device is that for very high f T (=cutoff frequency) some applications need to improve its speed

Method used

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  • Semiconductor device with a bipolar transistor and method of manufacturing such a device
  • Semiconductor device with a bipolar transistor and method of manufacturing such a device
  • Semiconductor device with a bipolar transistor and method of manufacturing such a device

Examples

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Embodiment Construction

[0017] The figures are diagrammatic and not drawn to scale, in particular, dimensions in the thickness direction are exaggerated for clarity. Semiconductor regions of the same conductivity type are generally indicated by hatching in the same direction. The same reference numbers refer to the same areas wherever possible.

[0018] Figure 1 to Figure 6 are schematic cross-sectional views of a semiconductor device according to the present invention at right angles to the thickness direction in successive stages of manufacture using the method according to the present invention. The almost fully completed device 10 of this example (see Image 6 ) comprises a semiconductor body 11 having an N-type silicon substrate 12 and a semiconductor layered structure on which a bipolar transistor is deposited. The transistor, which is discrete in this example, has an N-type emitter region 1 , a P-type base region 2 and an N-type collector region 3 , the regions 1 , 2 , 3 being provided with...

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Abstract

The invention relates to a semiconductor device (10) with a substrate and a semiconductor body of silicon comprising a bipolar transistor with an emitter region (1), a base region (2) and a collector region (3) which are respectively of the N-type conductivity, the P-type conductivity and the N-type conductivity by the provision of suitable doping atoms, wherein the base region (2) comprises a mixed crystal of silicon and germanium, the base region (2) is separated from the emitter region by an intermediate region (22) of silicon having a doping concentration which is lower than the doping concentration of the emitter region (1) and with a thickness smaller than the thickness of the emitter region (1) and the emitter region (1) comprises a sub-region comprising a mixed crystal of silicon and germanium which is positioned at the side of emitter region (1) remote from the intermediate region (22). According to the invention, the sub-region comprising the mixed crystal of silicon and germanium extend substantially through the whole emitter region (1) up to the interlace with the intermediate region (22) and the doping atoms of the emitter region (1) are arsenic atoms. Such a device has a very steep n-type doping profile (50) and a very steep p- type doping profile (20) at or within the intermediate region (22) and thus excellent high- frequency behavior with a high cut-off frequency (fr). Preferably the emitter region (1) is doped with an arsenic implantation (I) in its upper half, the final doping profile being formed after an RTA. The invention also comprises a method of manufacturing a device (10) according to the invention.

Description

technical field [0001] The present invention relates to a semiconductor device having a substrate and a silicon semiconductor body comprising a bipolar transistor having emitter, base and collector regions, each region being enhanced by the provision of suitable doping atoms are n-type conductivity, p-type conductivity and n-type conductivity, respectively, wherein the base region includes a mixed crystal of silicon and germanium, and a silicon intermediate region connects the base region with the emitter regions are separated, the middle region of silicon has a lower doping concentration than that of the emitter layer and has a thickness less than the thickness of the emitter region, and the emitter region comprises a mixture containing silicon and germanium a sub-region of the crystal, the sub-region being located on the side of the emitter region remote from the intermediate region. Such devices in which the emitter comprises a single crystal region are suitable for high f...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/737H01L21/331H01L29/08
CPCH01L29/66242H01L29/7378H01L29/0817
Inventor 菲利普·默尼耶-贝亚尔雷蒙德·J·达菲普拉巴特·阿加瓦尔戈德弗里丢斯·A·M·胡尔克斯
Owner NXP BV