Reduced parallel and pipelined high-order mimo lmmse receiver architecture
一种信道接收、接收天线的技术,应用在均衡器、基带系统、信道估算等方向,能够解决MIMO接收器复杂度增加、MIMO接收器难免等问题
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[0028] The following abbreviations are used here:
[0029] LMMSE: linear minimum mean square error;
[0030] CDMA: code division multiple access;
[0031] SIMO: single input multiple output;
[0032] MIMO: multiple input multiple output;
[0033] FPGA: field programmable gate array;
[0034] VLSI: Very Large Scale Integrated Circuit;
[0035] ASIC: application specific integrated circuit;
[0036] RTL: register transfer layer;
[0037] DSP: digital signal processing;
[0038] FFT: Fast Fourier Transform
[0039] As used herein, unless specifically indicated otherwise, the term CDMA generally refers to a spread spectrum communication system (eg, CDMA 2000). operator[] T and[] * indicates a transpose, while operator[] HHermitian operations known in the art are indicated. In summary, the present invention is a reduced complexity FFT-based linear equalizer and also includes a complete parallel VLSI architecture for the proposed MIMO receiver. To further reduce complex...
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