Processor system

一种处理器系统、处理器的技术，应用在数据处理电源、电数字数据处理、仪器等方向，能够解决很难处理能力等问题，达到低功耗的效果

Inactive Publication Date: 2008-03-05
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, it is difficult to satisfy the required processing capability while significantly reducing power consumption only by controlling the supply of the clock signal of the processor

Method used

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Examples

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no. 1 example

[0019] FIG. 1 is a block diagram illustrating a processor system of a first embodiment. As shown in FIG. 1, the processor system of the first embodiment includes a processor block 112, a bus controller 113, an external device 114, a measurement unit 109, a clock controller 110, a source voltage controller 111, and a board voltage controller 105. . The processor block 112 includes a CPU 101 , a built-in memory 103 , and a cache memory 104 interconnected by an internal bus 102 . The bus controller 113 controls external buses connected to the CPU 101 and external devices 114 . External device 114 includes SDRAM 106 and flash memory 107 .

[0020] The CPU 101 can access the built-in memory 103 or the cache memory 104 through the internal bus 102 by using a small number of processing cycles. Meanwhile, the CPU 101 can access the external device 114 via the external bus, but this access requires a greater number of processing cycles than the number of processing cycles required f...

no. 2 example

[0045] FIG. 4 is a block diagram illustrating an internal configuration of a measurement unit and a clock controller included in the processor system of the second embodiment. The processor system of the second embodiment differs from that of the first embodiment in the measurement unit. Other than that, the second embodiment is the same as the first embodiment. In FIG. 4 , elements common to those in FIG. 1 are referred to by the same reference numerals.

[0046] The measurement unit 309 of the present embodiment has a task information processing section 301 instead of the cycle determination section 215 included in the measurement unit 109 of the first embodiment. Job information 302 is input from the CPU 101 to the job information processing section 301 . A task is defined as an execution unit executed by an operating system installed in the processor system of the present embodiment, and includes a plurality of program functions. The task information may be an identific...

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PUM

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Abstract

A processor system includes a processor which has an internal memory, an external memory, and a bus controller which controls a bus to which the processor and the external memory are connected. The processor system also includes a measurement unit for measuring an instruction-execution rate of the processor, a clock controller for supplying the processor, the external memory, and the bus controller with clock signals having clock frequencies corresponding to the instruction-execution rate measured by the measurement unit, respectively, and a voltage controller for controlling a source voltage or a threshold voltage which are supplied to the processor, the external memory, and the bus controller, in accordance with the respective clock frequencies of the clock signals supplied to the processor, the external memory, and the bus controller.

Description

technical field [0001] The present invention relates to a processor system with low power consumption while satisfying the required processing capability. Background technique [0002] There has been a need for low power consumption mobile devices powered by batteries. A mobile device includes a processor for performing various processes such as those related to Internet connection, digital TV viewing, and sports playback, and power consumption in the mobile device increases in proportion to an increase in circuit size or the number of processes. For example, for this reason, in the invention described in Japanese Unexamined Patent Application Publication No. 11-110063, in order to reduce the power of the processor represented by CPU or MPU, the clock signal of the processor is adjusted according to the load of the corresponding processor. provided to control. [0003] However, it is difficult to satisfy the required processing capability while significantly reducing power...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F1/32
CPCG06F9/3836G06F2201/88G06F2201/81G06F1/3203G06F1/324Y02B60/1217G06F11/3409G06F9/3869Y02D10/00
Inventor 桑原佑治
Owner PANASONIC CORP
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