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Production method of metal wiring structure in semiconductor element

A technology of metal wiring and manufacturing method, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as uneven resistance of metal wires and difference in thickness of wiring structures, so as to avoid uneven resistance of wires and increase uniformity. Effect

Active Publication Date: 2008-06-11
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] The problem to be solved by the present invention is that there are thickness differences in the wiring structure formed by the manufacturing method of the metal wiring structure in the prior art semiconductor device, which leads to the defect of uneven resistance everywhere in the formed metal wire

Method used

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  • Production method of metal wiring structure in semiconductor element
  • Production method of metal wiring structure in semiconductor element
  • Production method of metal wiring structure in semiconductor element

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Embodiment 1

[0038] First of all, the present invention provides a method for manufacturing a metal wiring structure in a semiconductor device, comprising the following steps:

[0039]sequentially forming an etch stop layer and an interlayer dielectric layer on the semiconductor substrate, the etch stop layer and the interlayer dielectric layer including a dual damascene structure region and a metal interconnection region; the interlayer dielectric layer in the dual damascene structure region Form a through hole on the electrical layer; form a deep ultraviolet light absorbing layer that fills the through hole and covers the inner dielectric layer; forms a photoresist layer on the deep ultraviolet light absorbing layer, and exposes and develops to form a photoresist opening, double damascene The position of the photoresist opening in the structure area corresponds to the position of the through hole, and the width of the photoresist opening is greater than the width of the through hole. The ...

Embodiment 2

[0056]A method for fabricating a metal wiring structure in a semiconductor device, comprising: sequentially forming an etch stop layer and an inner layer dielectric layer on a semiconductor substrate, the etch stop layer and the inner layer dielectric layer including a dual damascene structure region and a metal Interconnect region; forming vias on the inner dielectric layer in the dual damascene region; forming a deep UV absorbing layer that fills the vias and covers the inner dielectric layer; forming photoresist on the deep UV absorbing layer layer, and exposed and developed to form a photoresist opening. The position of the photoresist opening in the dual damascene structure area corresponds to the position of the via hole, and the width of the photoresist opening is greater than the width of the via hole. The position of the photoresist opening in the metal interconnection area For the position where the metal wiring is to be formed; pre-etching: using the photoresist laye...

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Abstract

The invention relates to a metal wiring structure fabrication method in a semiconductor device; after a wiring pattern is formed and through adjusting the component proportion of etching agent, the selection ratio of the etching rate of an ultraviolet light absorption layer and an inner medium layer is controlled; firstly a first etching phase is performed till a deep ultraviolet light absorption layer in the position of an photoresist opening of a connecting area of the metal is fully removed; secondly a second etching phase is performed in order that the channel depth of the connecting area of the metal is the same with that of a dual-damascene structure area basically. The invention reduces the nonuniformity of resistance distribution of metal conducting wires in the metal wiring of the prior art and improves the reliability of circuit connection.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for manufacturing a metal wiring structure in a semiconductor device. Background technique [0002] Generally, the semiconductor process is to use deposition process, photolithography process, etching process, etc. to form integrated circuit devices on silicon wafers. In order to connect various components to form an integrated circuit, a relatively high-conductivity metal material such as copper is usually used for wiring, that is, metal wiring. One of the most conventional processes in metal wiring is the metal dual damascene process and the metal interconnection process. [0003] The metal dual damascene process is a process of filling via holes and trenches formed by selectively etching an interlayer insulating film with a metal material. For example, the dual damascene process provided by the Chinese patent application document with application...

Claims

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Application Information

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IPC IPC(8): H01L21/768
Inventor 沈满华马擎天
Owner SEMICON MFG INT (SHANGHAI) CORP
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