Unlock instant, AI-driven research and patent intelligence for your innovation.

Silicon slice with asymmetry edge contour and manufacturing method thereof

An edge profile, asymmetric technology, used in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., can solve the problems of reduced process qualification rate, process defects, particle contamination, etc., to improve the process qualification rate , the effect of reducing particle pollution

Active Publication Date: 2010-10-27
宁夏中欣晶圆半导体科技有限公司
View PDF7 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the subsequent wafer processing process, the silicon wafer will be thinned on the back side. figure 1 , figure 2 , image 3 As shown in the figure below the middle arrow, the final thickness t is usually about 100 μm. The edge of the silicon wafer manufactured by the traditional chamfering method will present an acute angle (generally between about 5° and 50°) after the back side is thinned, as shown in attached figure 1 , figure 2 As shown in , during the processing of these acute-angled parts, edge damage, gaps or even fragments are prone to occur, which can induce process defects, produce particle pollution, and lead to a decrease in process pass rate

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Silicon slice with asymmetry edge contour and manufacturing method thereof
  • Silicon slice with asymmetry edge contour and manufacturing method thereof
  • Silicon slice with asymmetry edge contour and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0022] A preferred embodiment of the present invention is described as follows in conjunction with accompanying drawing: See Figure 4 , the silicon chip with asymmetric edge profile of the present invention, its edge profile is composed of circular arcs and straight lines, showing an asymmetric shape. The upper surface 1, the lower surface 7, and the tip face 4 of the silicon wafer are linear parts, the upper surface 1 is connected with the tip face 4 of the silicon wafer through the arc EP1 3, and the tip face 4 of the silicon wafer is connected through the arc EP2 5 and the hypotenuse 6 is connected to the lower surface 7 . The top end surface 4 of the silicon wafer is tangent to the arcs EP1 3 and EP2 5 , the arc EP1 3 is intersected with the upper surface 1 , and the arc EP2 5 is tangent to the hypotenuse 6 .

[0023] see Figure 4 and Figure 5 , The term represented by the symbol in the figure is: "T" indicates the thickness of the semiconductor silicon wafer after p...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a silicon chip with asymmetry edge profile and a manufacturing method. The edge profile of the silicon chip comprises a profile from the upper surface of the silicon chip to the lower surface of the silicon chip via twisting the front end surface of the silicon chip. The front end surface of the silicon chip is a straight line, the transitional edge profile between the upper surface of the silicon chip and the front end surface of the silicon chip is a passage of circular arc EP1, the circular arc EP1 is tangent with the front end surface of the silicon chip and is intersecting with the upper surface of the silicon chip. The transitional edge profile between the lower surface of the silicon chip and the front end surface of the silicon chip are a long sloping sideand a passage of circular arc EP2, the long sloping side and the lower surface of the silicon chip are with alpha angle, the circular arc EP2 is respectively tangent with the long sloping side and the front end surface of the silicon chip. The steps of the manufacturing method of the silicon chip comprise cutting film, chamfering hob and reserving polishing surplus on the upper surface, grinding the upper and lower surface, conducting etching treatment and polishing the upper surface to remove the reserved polishing surplus. After thinning process in the next phase, the edge of the silicon chip does not form an acute angle, the probability of damaging the edge is reduced and the percent of pass of the finished product is increased.

Description

technical field [0001] The invention relates to a silicon chip with an asymmetric edge profile and a manufacturing method thereof, belonging to a semiconductor device manufacturing method using a silicon chip as a substrate in a mass production process. Background technique [0002] Using the traditional substrate silicon wafer manufacturing method, the silicon wafer needs to go through the following steps: slicing, chamfering, grinding, etching, and polishing on one or both sides. The edge profile of the silicon wafer after chamfering has two types: T-type and R-type (such as figure 1 and figure 2 Shown), all belong to the symmetrical profile, that is, the front and back surfaces of the silicon wafer have the same edge profile. In the subsequent wafer processing process, the silicon wafer will be thinned on the back side. figure 1 , figure 2 , image 3 As shown in the figure below the middle arrow, the final thickness t is usually about 100 μm. The edge of the silico...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/00H01L21/302
Inventor 洪漪
Owner 宁夏中欣晶圆半导体科技有限公司
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More