Multi-chip packaging structure and making method thereof

Abstract

The invention relates to a manufacturing method for a multichip packaging structure, wherein, firstly, a plurality of concave cavities which are generated by local removal of a first silicon slice and a first metallic layer are formed on a predetermined cut line of the first silicon slice, and a conductive wall of a first line layer is electrically connected with a cutting profile of the first metallic layer which is exposed into the concave cavities; moreover, a second silicon slice and a conductive lug of the second silicon slice are pressed into a cover layer and electrically connected with the first line layer; secondly, the first metallic layer is patterned so as to form a second line layer which is provided with a plurality of second welded gaskets; thirdly, the first silicon slice and the second silicon slice are cut along the predetermined cut line so as to form a plurality of separated multichip packaging structures.

Description

technical field [0001] The invention relates to a semiconductor packaging process, and in particular to a manufacturing method of a multi-chip packaging structure. Background technique [0002] With the advancement of semiconductor technology, Ball Grid Array (BGA), Chip-Scale Package (CSP), Flip Chip package (F / C package) and multi- Chip module (Multi-Chip Module, MCM) and other high-density integrated circuit packaging technologies have also emerged. For high-density integrated circuit packaging, shortening the length of the connecting lines will help to increase the speed of signal transmission, so the application of bumps has gradually become the mainstream of high-density packaging. [0003] figure 1 It is a schematic cross-sectional view of a multi-chip packaging structure in the prior art. Please refer to figure 1 , the multi-chip packaging structure 100 is composed of a carrier 110 , a first chip 120 , a second chip 130 , a plurality of bonding wires 140 and an e...

AI Technical Summary

Problems solved by technology

[0004] However, the overall thickness and size of the above-mentioned multi-chip packaging structure 100 are not easy to shrink, which not only does not meet the trend of miniaturization of packaging technology, but also reduces the competitiveness of products in the market.

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