Transistor array, manufacturing method thereof, semiconductor device and manufacturing method thereof

Abstract

The invention provides a transistor array, a manufacturing method thereof, a semiconductor device and a manufacturing method thereof. The manufacturing method of the transistor array comprises the steps: providing a wafer; forming a plurality of insulating strips extending along the first direction in the wafer; enabling the insulating strips to divide part of the wafer into a plurality of transistor strips extending along the first direction; etching the transistor strip from the first surface of the wafer to form a plurality of transistor columns arranged in an array; enabling each transistor column to be provided with a side wall attached to the insulating strip and an exposed side wall; forming a gate layer which semi-surrounds the transistor column on the exposed side wall of each transistor column; forming a source electrode of the transistor at the first end of each transistor column; and forming a drain electrode of the transistor at the second end of each transistor column. The first end and the second end are the two opposite ends of the transistor column in the second direction respectively, and the transistor column between the source electrode and the drain electrode forms a channel region of the transistor.

Description

technical field [0001] The present disclosure relates to the technical field of semiconductors, and relates to but not limited to a transistor array and a manufacturing method thereof, a semiconductor device and a manufacturing method thereof. Background technique [0002] Transistors are widely used as switching devices or driving devices in electronic equipment. For example, transistors can be used in Dynamic Random Access Memory (DRAM) to control the capacitance in each memory cell. [0003] In related technologies, transistors mainly include planar transistors and buried channel transistors. However, whether it is a planar transistor or a buried channel transistor, its source (Source, S) and drain (Drain, D) are located at the gate On the horizontal sides of (Gate, G), the source and drain occupy different positions under this structure, making the area of ​​the transistor larger. In addition, in the memory device, the source and drain of the transistor will be connect...

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Problems solved by technology

[0003] In related technologies, transistors mainly include planar transistors and buried channel transistors. However, whether it is a planar transistor or a buried channel transistor, its source (Source, S) and drain (Drain, D) are located at the gate On the horizontal sides of (Gate, G), the source and drain occupy different positions under this structure, making the area of ​​the transistor larger

In addition, in the memory device, the source and drain of the transistor will be connected to different structures after being formed. When the source and drain are located on the horizontal sides of the gate, it will easily lead to complicated circuit wiring inside the memory and difficult manufacturing process. Big

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