A design method for low-density odd/even check code matrix

A parity check matrix, low-density technology, applied in the field of communication, can solve the problem that the convergence speed is not very obvious

Inactive Publication Date: 2008-09-10
FUDAN UNIV
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Problems solved by technology

[0016] However, when the algorithm based on layer scheduling uses a check matrix with a large column weight d, the converg

Method used

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  • A design method for low-density odd/even check code matrix
  • A design method for low-density odd/even check code matrix
  • A design method for low-density odd/even check code matrix

Examples

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Example Embodiment

[0091] The following is an example of implementing an LDPC code with a code length of 1200, a sub-matrix of 30×30, and a code rate of 3 / 4:

[0092] The constraints of the hardware implementation are: dmax = 4, M b = 10.

[0093] Follow step 1 and attached Figure 6 As shown, the matrix has 300 rows and 1200 columns, among which the first 900 columns are information symbols, and the last 300 columns are check symbols. Each row is divided into 40 sub-matrices, the first 30 belong to information symbols, and the last 10 belong to check symbols. Each column has 10 sub-matrices.

[0094] Follow step 2 and attached Figure 7 As shown, the depth from the first block of memory to the eighth block of memory is 3 4 4 44 44 4 in order. The depth of the ninth and tenth blocks is 9. Since the sub-matrix information of the 30th variable node has a column weight of 3, it cannot be stored in the ninth and tenth blocks, but is stored in the eighth block.

[0095] Follow step 3 and attached Figure ...

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Abstract

The invention pertains to the communication technical field, and particularly relates to a design method of a low density parity-check matrix. Aiming at distributing the storage, avoiding the read/write conflict and simplifying an encoder, the design method of the invention designs an H check matrix based on a layer scheduling algorithm decoding method, and conducts a beam-column transform to the check matrix and searches for the largest average ring to improve performances. By adopting the method of the layer scheduling Min-Sum algorithm to decode, the matrix can simultaneously meet the requirements of realizing high performances and low complexity hardware. The matrix produced by using the method of the invention can realize an LDPC decoding circuit with low complexity and high throughput rate.

Description

technical field [0001] The invention belongs to the technical field of communication, and in particular relates to a method for designing a check matrix of a channel codec-LDPC code in a communication system. Background technique [0002] LDPC code, also known as Low Density Parity Check Code (LDPC), is a kind of linear block code with sparse check matrix proposed by Dr. Robert G. Gallager in 1963. LDPC not only has good performance close to Shannon's limit, but also can realize high-throughput data transmission by means of parallel decoding. Due to the complex decoding algorithm and the backward integrated circuit technology at that time, it was difficult to realize it with hardware structure, so it did not attract people's attention. With the rapid development of integrated circuit technology and the continuous improvement of LDPC decoding algorithm, LDPC codes aroused people's attention again in the early 1990s. Therefore, the study of high-performance and low-complexit...

Claims

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Application Information

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IPC IPC(8): H03M13/11H04L1/00
Inventor 任俊彦刘志贵叶凡刘亮王雪静张成翁迪
Owner FUDAN UNIV
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