Lateral trench field-effect transistors in wide bandgap semiconductor materials, methods of making

Abstract

A junction field effect transistor is described. The transistor is made from a wide bandgap semiconductor material. The device comprise source, channel, drift and drain semiconductor layers, as well as p-type implanted or Schottky gate regions. The source, channel, drift and drain layers can be epitaxially grown. The ohmic contacts to the source, gate, and drain regions can be formed on the same side of the wafer. The devices can have different threshold voltages depending on the vertical channel width and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used for digital, analog, and monolithic microwave integrated circuits. Methods for making the transistors and integrated circuits comprising the devices are also described.

Description

[0001] This application is related to U.S. Patent Application 60 / 585,881 filed on July 8, 2004 and the application entitled "Normally-Off Integrated JFET PowerSwitches in Wide Bandgap Semiconductors and Methods of Making" filed on December 1, 2004. normally-off integrated JFET power switch and method of manufacture)" in US Patent Application 11 / 000,222. Each of the above applications is fully incorporated herein by reference. technical field [0002] This invention relates generally to lateral field effect transistors (FETs) having vertical channels, and in particular to such transistors formed in wide bandgap semiconductor materials. The invention also relates to monolithic integrated circuits comprising such transistors. Background technique [0003] Wide bandgap semiconductor materials (E G >2eV) such as silicon carbide (SiC) or Group III nitride compound semiconductors (eg gallium nitride GaN) are very attractive for use in high power, high temperature and / or radiat...

AI Technical Summary

Problems solved by technology

Other issues include: low reverse channel mobility due to high interface state density at the SiC / SiO2 interface and high fixed charge density in the insulator; and Threshold voltage drifts significantly with temperature

The main drawback of this scheme is that it is difficult to achieve monolithic integration of low-voltage control circuits and power switches for smart power electronics

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