Analog determining feedback equalizer used for high-speed serial interface

A technology of decision-feedback equalization and high-speed serial interface, applied in the field of analog decision-feedback equalizers, which can solve the problems of increasing noise in high-frequency areas and unable to completely eliminate ISI, achieving good linearity, saving design costs, and low linearity and absolute error Effect

Inactive Publication Date: 2009-01-07
RFDOT MICROELECTRONICS
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The analog high-frequency gain circuit is a linear blind compensation circuit, which cannot completely eliminate ISI and will increase noise in the high-frequency region

Method used

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  • Analog determining feedback equalizer used for high-speed serial interface
  • Analog determining feedback equalizer used for high-speed serial interface
  • Analog determining feedback equalizer used for high-speed serial interface

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Embodiment Construction

[0023] Below the present invention will be further described in conjunction with the embodiment in the accompanying drawing:

[0024] Figure 1 to Figure 4 As shown, it includes a high-frequency compensation circuit 11, an analog compensation signal generation circuit 12, a first analog adder 13, a first shift comparator 14, a second shift comparator 15, a first output multiplexer 16, a second analog adder device 17, the third analog adder 18, the second output multiplexer 19, the third displacement comparator 20, the error register 21, the voting logic counter 22, the lock determination circuit 23, the state counter 30, the voting multiplexing circuit 31, the first XOR gate 32, second XOR gate 33, third XOR gate 34, first bidirectional counter 35, second bidirectional counter 36, third bidirectional counter 37, first integrator 38, second integrator 39, the first Three integrators 40, an adder 41, a fourth exclusive OR gate 45, a fifth exclusive OR gate 46, an OR gate 47, a ...

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PUM

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Abstract

The invention relates to an analog decision feedback equalizer which is used in a high-speed serial interface, and the analog decision feedback equalizer mainly adopts a high-frequency compensation circuit, an analog compensation signal generation circuit, a first analog adder, a first displacement comparator, a second displacement comparator, a third displacement comparator, a first output multiplexer, a second analog adder, a third analog adder, a second output multiplexer, an error register, a voting logic counter and a locked judgment circuit which are connected through ports. An analog signal to be processed is input by the high-frequency compensation circuit, after that, the analog signal and output of the analog compensation signal generation circuit compensate nodes through the first analog adder; the first and the second displacement comparators and the first output multiplexer are used for judging output data. The second and the third analog adders and the second output multiplexer constitute an error generating circuit. The analog decision feedback equalizer has lower requirements on linearity and absolute errors of the analog circuit, thereby saving design cost, having better linearity of the analog adders of the compensation circuit and causing no compensation errors.

Description

technical field [0001] The invention relates to an analog decision feedback equalizer used in a high-speed serial interface, which is suitable for a serial data interface circuit exceeding 1Gbps. Background technique [0002] In high-speed serial digital interface circuits, the data transfer rate is affected by the channel bandwidth. Even on short-distance (>30cm) printed circuit boards, frequency components exceeding 1GHz often have an attenuation of more than 30dB. The attenuation of the high-frequency signal leads to pulse broadening, thereby causing inter-symbol interference (Inter-Symbol-Interference, ISI). In the receiving circuit, an analog high-frequency gainer (Emphasizer) and a decision feedback equalizer (Decision Feedback Equalizer, DFE) compensation circuit are two main techniques for compensating channel high-frequency attenuation. The analog high-frequency gain circuit is a linear blind compensation circuit, which cannot completely eliminate ISI and will ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L25/03
Inventor 冯向光何广宏
Owner RFDOT MICROELECTRONICS
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