[0011] example figure 2 A structure of a semiconductor device in which an STI is formed according to an embodiment of the present invention is shown. reference example figure 2 , a pad oxide film 302 may be sequentially formed over a semiconductor substrate (P-type substrate (P-Substrate)) which may include a high voltage (hereinafter, referred to as HV) region and a low voltage (hereinafter, referred to as LV) region and nitride film 303. The pad oxide film 302 and the nitride film 303 can be selectively removed using the PR pattern 304 . The STI 305 can be formed using the removed pad oxide film 302 and nitride film 303 as an etching mask.
[0012] An oxide film 306 may be formed thereon and planarized by a planarization process. A capping layer (for example, a nitride film) 308 may be formed over the entire surface of the planarized top portion. The PR pattern 309 may be formed to open only the HV region, and then the nitride film of the HV region may be removed by a streaming process.
[0013] Boron 310 may be deposited in the top corner (eg, STI top edge portion) of the STI of the HV region using a tilting ion implantation method. The remaining PR pattern 309 in the LV region may be removed by a flow process. The oxidation process 311 may be performed using a dry, high temperature method. In this way, in the entire structure, the top corner of the STI has LOCOS (Local Oxidation of Silicon), the top corner of the STI is a rounded S2, and the STI step (STIstep) is added. For example, this new type of semiconductor device can be used in high-voltage or high-power applications.
[0014] example Figure 3A to Figure 3I is a vertical cross-sectional view of each process in the method for manufacturing the semiconductor device according to the embodiment of the present invention. reference example Figure 3A , a pad oxide film 302 and a nitrogen substrate are sequentially formed over a semiconductor substrate (P-type substrate, for example, a silicon substrate, a ceramic substrate, a polymer substrate, etc.) 301 including an HV region and an LV region. Chemical film 303. The pad oxide film 302 can be formed to a thickness of about 200 angstroms to 300 angstroms, and the nitride film 303 can be formed to a thickness of about 1000 angstroms to 1500 angstroms.
[0015] Second, a portion of photoresist (PR) deposited over the entire surface can be selectively removed by performing exposure and development processes using reticle designed according to a predetermined target pattern. In this way, the PR pattern 304 can be formed over the top of the nitride film 303 to define Figure 3B STI region shown.
[0016] Then, the pad oxide film 302 and the nitride film 303 may be selectively removed through an etching process using the PR pattern 304 as a mask to form an STI pattern. The residual PR pattern 304 can be removed by a flow process. An etching process (for example, dry etching) may be performed on the exposed semiconductor substrate 301 using the STI pattern, the pad oxide film 302, and the nitride film 303 as an etching mask to a depth of about 1500 angstroms to 4000 angstroms to thereby form example Figure 3C shown in the STI305.
[0017] example Figure 3D As shown in , oxide film 306 may be formed over the entire surface of semiconductor substrate 301 including STI 305 , pad oxide film 302 , and nitride film 303 . example Figure 3E As shown, a CMP (Chemical Mechanical Polishing) planarization process may be performed on the formed oxide film 306 to form a planarized oxide film 307 . A stepped portion on the planarized oxide film 307 is generated by device characteristics in the HV region and the LV region.
[0018] example Figure 3F As shown, a capping layer (for example, a nitride film) 308 may be formed over the entire surface of the top of the nitride film 303 including the planarized oxide film 307 . The nitride film 308 may be formed to a thickness of about 100 angstroms to 500 angstroms. Second, a partial PR can be deposited over the entire surface. A portion of PR on the HV region may be selectively removed to form the PR pattern 309 only in the LV region by performing an exposure and development process using a reticle designed according to a predetermined target pattern. This only exposes the HV region. example Figure 3G As shown, the nitride film in the HV region was removed by the flow process.
[0019] example Figure 3H As shown, boron 310 may be ion-implanted in the top corner of the STI (ie, the STI top edge portion) of the HV region using a sloped approach. This ion implantation compensates for the decrease in doping concentration caused by boron segregation that occurs in the top corner portion of the STI. For example, ion implantation can be performed at an inclination angle of 20° to 40°, and the dose can be about 10 11 ion/cm 2 to 10 12 ion/cm 2 , the energy can be about 100 keV to 200 keV, and the doping concentration of the active center (active center) and the doping concentration of the STI corner can be the same.
[0020] Finally, as the example Figure 3I As shown in , boron has been ion-implanted using the tilt method. The PR pattern 309 remaining in the LV region may be removed through a flow process. The oxidation process 311 may be performed using a dry method at a high temperature (eg, in a range of about 1000° C. to 1200° C.). Since the nitride film 308 is covered, the LV region does not change, but the HV region changes. For example, the STI top corner part has LOCOS (Local Oxidation of Silicon), the STI top corner S2 is rounded, and the STI step is added.
[0021] Therefore, in the embodiment of the present invention, the top corner of the STI has LOCOS, the top corner of the STI is rounded, and the steps of the STI (STI step) are added. As described above, this is accomplished by forming the STI in the high-voltage region and the low-pressure region, forming a nitride film over the entire surface of the STI as a capping layer, and forming a PR pattern over the top of the formed nitride film to make only the high-voltage The region is opened, and the nitride film of the high voltage region is removed by performing an etching process using the formed PR pattern as a mask, an oxidation process is performed on the STI top corner of the high voltage region from which the nitride film is removed, and ion implantation is performed.
[0022] It will be apparent to those skilled in the art that various modifications and changes can be made to the disclosed embodiments of the invention. Thus, the disclosed embodiments of this invention are intended to cover any modifications and variations of this invention that come within the scope of the appended claims and their equivalents.
