Semiconductor encapsulation stacking combined construct for protecting welding spot between external pins
A technology of packaging stacking and external pins, which is used in semiconductor devices, semiconductor/solid-state device components, electric solid-state devices, etc., and can solve the problems of inconvenience, general products without suitable structure, and solder joint fracture
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[0048] In order to further illustrate the technical means and effects that the present invention takes to achieve the intended purpose of the invention, below in conjunction with the accompanying drawings and preferred embodiments, the structure of the semiconductor package stacking combination for protecting the solder joints between the outer pins proposed according to the present invention will be described below. Specific embodiments, structures, features and effects thereof are described in detail below.
[0049] The aforementioned and other technical contents, features and effects of the present invention will be clearly presented in the following detailed description of preferred embodiments with reference to the drawings. Through the description of the specific implementation mode, when the technical means and functions adopted by the present invention to achieve the predetermined purpose can be obtained a deeper and more specific understanding, but the accompanying dra...
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