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Trench MOSFET and manufacturing method thereof

A technology of field effect transistors and oxides, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of reducing TrenchMOSFET switching speed, increasing delay, and TrenchMOSFET performance deterioration

Active Publication Date: 2009-05-27
MAGNACHIP SEMICON LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The thin first gate oxide film layer A is used as a parasitic capacitance between the gate 40 and the epitaxial layer 20 corresponding to the drain region, therefore, when the Trench MOSFET is turned on / off, the time delay is increased And reduce the switching speed of Trench MOSFET, which leads to the deterioration of the performance of Trench MOSFET
[0011] Also, when a leakage current occurs between the epitaxial layer 20 and the main body 30 around the trench 41 due to the presence of the first gate oxide film layer A of the thin film, the electric field increases, thereby causing the main body layer 30 and the epitaxial The reduction in breakdown voltage between layers 20

Method used

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  • Trench MOSFET and manufacturing method thereof
  • Trench MOSFET and manufacturing method thereof
  • Trench MOSFET and manufacturing method thereof

Examples

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no. 1 example

[0033] The structure and manufacturing method of the Trench MOSFET according to the first embodiment of the present invention will be specifically described below with reference to the relevant drawings.

[0034] figure 2 Represent a cross-sectional view of the N-channel Trench MOSFET according to the first embodiment of the present invention, and FIGS. 3A to 3J successively represent a schematic diagram of the manufacturing process of the N-channel Trench MOSFET according to the first embodiment of the present invention, Figure 4 A graph showing the capacitance curve of the N-channel Trench MOSFET according to the first embodiment of the present invention.

[0035] Such as figure 2As shown, the N-channel Trench MOSFET according to the present invention includes a base layer 100, an epitaxial layer 110 formed on the base layer 100, a bulk layer 120 doped with a dopant opposite to the type of the epitaxial layer 110, and an epitaxial layer 110 and A groove 131 vertically f...

no. 2 example

[0067] In particular, the structure and manufacturing method of the Trench MOSFET according to the second embodiment of the present invention will be described below with reference to the relevant drawings. Therefore, only the structure and manufacturing method in the second embodiment that are different from the first embodiment will be described, and descriptions of the same contents will be omitted.

[0068] Image 6 Showing a cross-sectional view of an N-channel Trench MOSFET according to a second embodiment of the present invention, Figure 7 A cross-sectional view showing a P-channel Trench MOSFET according to a second embodiment of the present invention

[0069] First, if Image 6 As shown in , the N-channel TrenchMOSFET according to the second embodiment of the present invention includes a base layer 200, an epitaxial layer 210 formed on the base layer 200, a bulk layer 220 doped with a dopant opposite to the type of the epitaxial layer 210, and the epitaxial layer ...

no. 3 example

[0074] Hereinafter, the structure and manufacturing method of a Trench MOSFET according to a third embodiment of the present invention will be described with reference to the relevant drawings.

[0075] Figure 8 Showing a cross-sectional view of an N-channel Trench MOSFET according to a third embodiment, Figure 9 A cross-sectional view showing a P-channel Trench MOSFET according to the third embodiment.

[0076] Such as Figure 8 As shown in , the N-channel Trench MOSFET according to the third embodiment includes a base layer 300 , an epitaxial layer 310 formed on the base layer 300 , a bulk layer 320 doped with a dopant opposite to that of the epitaxial layer 310 , an epitaxial layer 310 The trench 331 formed perpendicular to the central portion of the main body layer 320, the diffusion oxide film layer 135 formed on the epitaxial layer 310 between the lower surface of the trench 331 and the upper portion of the base layer 300, and the second layer formed in the trench 33...

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Abstract

The invention relates to a trench MOSFET which can reduce parasitic capacitance so as to increase a switching speed. The invention further relates to a method for manufacturing the trench MOSFET. The trench MOSFET comprises: a substrate where an epi layer and a body layer sequentially formed; a trench formed vertically in the central portion of the epi layer and the body layer; a first gate oxide film formed on the two side walls of the trench; a spread oxide film layer which is formed in the epi layer between the lower surface of the trench and the upper surface of the substrate and has a thickness greater than a thickness of the first gate oxide film and a width greater than a width of the trench; a gate formed in the trench having the first gate oxide film; a second gate oxide film formed on the gate; and a source region formed at both sides of the upper portion of the gate. Thereby, the trench MOSFET reduces the generation of parasitic capacitance between the epi layer corresponding to a drain region and the gate, so as to improve the switching speed.

Description

technical field [0001] The invention relates to a Trench MOSFET (trench metal oxide field effect transistor) and a manufacturing method thereof. Specifically, the present invention relates to a Trench MOSFET in which the thickness of the diffusion oxide film layer located between the lower portion of the gate and the epitaxial layer is selectively increased, thereby reducing the parasitic capacitance in the overlapping region, thereby improving switching speed, the invention also relates to a method of manufacturing said Trench MOSFET. Background technique [0002] Generally, a Trench MOSFET is a transistor in which a channel is formed in a vertical direction and a gate is formed in a trench extending between a source and a drain. [0003] Such Trench MOSFETs are studded with a thin insulating layer such as oxide, filled with a conductor such as polysilicon and allow low current flow, thereby providing a low value of specific on-resistance. [0004] Hereinafter, a conventi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/423H01L21/336H01L21/28
CPCH01L29/41766H01L29/66734H01L29/4236H01L29/66727H01L29/42368H01L29/7813H01L21/18H01L21/02233H01L21/28556H01L21/31144
Inventor 申铉光李旿衡
Owner MAGNACHIP SEMICON LTD