Method for etching bottom layer anti-reflection layer and manufacturing wire laying slot
An anti-reflection layer and etching technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as affecting the accuracy of wiring trenches, and achieve the effect of slowing down the etching rate and accelerating the etching rate.
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[0026] refer to image 3 As shown, an embodiment of the method for fabricating wiring trenches in the present invention includes the following steps,
[0027] Step s10, providing a semiconductor structure, the semiconductor structure comprising a multilayer structure consisting of a lower insulating layer, an etching stop layer on the lower insulating layer, an upper insulating layer on the etching stop layer, and an anti-reflection layer on the upper insulating layer, the The multilayer structure has a groove, and the bottom antireflection layer is covered in the groove and on the surface of the antireflection layer;
[0028] Step s20, etching the bottom anti-reflection layer on the wafer to remove the bottom anti-reflection layer to expose the anti-reflection layer, wherein the bottom anti-reflection layer on the wafer includes the bottom anti-reflection layer at the center of the wafer and the surrounding The bottom anti-reflection layer of the bottom anti-reflection layer...
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