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Integrated circuit and method for implementing high speed two-dimension discrete cosine transform

A discrete cosine transform and two-dimensional discrete cosine technology, applied in television, electrical components, image communication, etc., can solve problems such as high-speed image data compression processing

Inactive Publication Date: 2009-07-22
SHANDONG UNIV +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0008] In order to overcome the defects and deficiencies of the prior art, the present invention provides an integrated circuit and method for realizing high-speed two-dimensional discrete cosine transform, so as to solve the problem of high-speed image data compression processing at present

Method used

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  • Integrated circuit and method for implementing high speed two-dimension discrete cosine transform
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  • Integrated circuit and method for implementing high speed two-dimension discrete cosine transform

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Embodiment 1

[0079] Embodiment 1: (hardware embodiment)

[0080] The integrated circuit embodiment of the present invention is for example Figure 1-2 As shown, it includes a transformation coding control module 8, a bit expansion module 1, a data selection module 2, a serial-to-parallel conversion module 3, a one-dimensional discrete cosine transform module 4, a parallel-to-serial module 5, a transposed storage matrix RAM module 7, and a bit interception Module 9 and transposition address generation module 6 are characterized in that bit expansion module 1 is connected with data selection module 2; data selection module 2 is connected with serial parallel conversion module 3; serial parallel conversion module 3 and one-dimensional discrete cosine transform module 4 are connected; the one-dimensional discrete cosine transform module 4 is connected with the parallel-to-serial module 5; the parallel-to-serial module 5 is connected with the transposed storage matrix RAM module 7 through the b...

Embodiment 2

[0087] Embodiment 2: (method embodiment)

[0088] A working method of the transformation coding control module 8 in the above-mentioned circuit, as image 3 As shown, the steps are as follows:

[0089] 18: In the initial state, the device is idle, and the data conversion end signal is high level; other control output signals are low level;

[0090] 19: Input the conversion start enable signal to be high level, the modulo 163 counter included in the conversion coding control module 8 starts counting, all the module output signals are low level, and when the counter increases to 6, jump to the next step;

[0091] 20: The output serial-to-parallel conversion enable signal is high level, and other control output signals are low level; jump to the next step in the next clock cycle;

[0092] 21: Output the one-dimensional discrete cosine transform module to transform the enable signal to a high level, and other control signals to a low level, and the counter increases to 14 to jum...

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Abstract

An integrate circuit and a method for implementing high speed two-dimension discrete cosine transform belong to the video and image data compression technique field comprising a transform coding control module and a bit extension module or the like. The bit extension module is connected to a data selection module; the data selection module is connected to a series-parallel conversion module; the series-parallel conversion module is connected to a one-dimensional discrete cosine transform module; the one-dimensional discrete cosine transform module is connected to a parallel to serial module; the parallel to serial module is connected to a transposition memory matrix RAM module through a bit interception module; a transform coding control module is respectively connected to the data selection module, the series-parallel conversion module, the one-dimensional discrete cosine transform module, the parallel to serial module, a transposition address generator module and the transposition memory matrix RAM module; the transposition memory matrix RAM module is connected to the data selection module. The invention has less resource consumption, and saves the resource at the same time of satisfying a realtime processing speed demand in maximum.

Description

technical field [0001] The invention relates to an integrated circuit and method for realizing high-speed two-dimensional discrete cosine transform, belonging to the technical field of video and image data compression. Background technique [0002] As a frequency-domain transform, DCT transform (Discrete Cosine Transform, DCT) is the core of most of today's image and video codec standards, including JPEG, H.264, H.263+, MPEG-1, MPEG -2 and MPEG-4. As a transformation coder, it is widely used in static and dynamic image and video compression because of its advantages in gathering image energy, removing correlation between data and being suitable for software and hardware implementation. The commonly used transformation coding method is the two-dimensional discrete cosine transform of 8×8 data blocks. [0003] For a given sequence f(x, y) whose pixels are N×N, its two-dimensional DCT transformation is: [0004] F ( u ,...

Claims

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Application Information

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IPC IPC(8): H04N7/26H04N19/625
Inventor 马磊李春蕾李运田刘江
Owner SHANDONG UNIV
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