Chip package substrate, chip package body, and method for manufacturing chip package body

Abstract

The invention discloses a chip package body, which comprises a circuit substrate, at least one chip and a packaging colloid. The circuit substrate comprises a conductive pattern layer, a circuit layer, a dielectric layer and a plurality of conductive blind hole structures. The conductive pattern layer comprises a plurality of connecting pads. The circuit layer is configured above the conductive pattern layer. The dielectric layer is configured between the conductive pattern layer and the circuit layer and covers all, except the fully exposed bottom surfaces, of the surfaces of the connecting pads. The dielectric layer has a plurality of blind holes. The conductive blind hole structures are arranged in the blind holes respectively. The conductive pattern layer is connected with the circuit through the conductive blind hole structures. The chip is configured on the circuit substrate, and the packaging colloid covers the chip. The invention also discloses a method for manufacturing the chip package body and a chip package substrate.

Description

Technical field [0001] The invention relates to a circuit board, and in particular to a chip package carrier board, a chip package body and a manufacturing method thereof. Background technique [0002] Today's semiconductor technology is advanced, and many chips have a large number of high-density transistors (transistor) elements and many pads arranged on the surface of the chip. In order to be able to package these chips, these chips are usually mounted on a chip package carrier to form a chip package. The current chip package usually uses a copper foil substrate (Copper Clad Laminate, CCL). ) Made. [0003] Figure 1A to Figure 1E It is a schematic flow diagram of a manufacturing method of a known chip package. See Figure 1A versus Figure 1B The manufacturing method of the known chip package includes the following steps. First, a copper foil substrate 110 is provided, which includes a dielectric core layer 112 and two layers of copper foil 114' respectively disposed on two ...

AI Technical Summary

Problems solved by technology

[0007] However, once the thickness of the copper clad substrate 110 becomes too thin, the copper clad substrate 110 will become very fragile, so that it is easily broken by external force.

Therefore, the very thin copper foil substrate 110 cannot use the existing production equipment to cooperate with the current process (such as Figure 1A to Figure 1E Shown) to m

Images