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MOS capacitor capable of reducing plasma damage effect

A damage effect, plasma technology, applied in the direction of circuits, electrical components, semiconductor devices, etc.

Active Publication Date: 2011-02-02
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When making the gate metal pad P, the wires of the gate metal pad P will collect free charges due to the plasma damage effect. When the collected free charges accumulate to a certain extent, discharge will occur and it is easy to generate on the gate oxide layer. Plasma damage increases the leakage of MOS capacitors, and in severe cases, MOS capacitors will be scrapped

Method used

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  • MOS capacitor capable of reducing plasma damage effect
  • MOS capacitor capable of reducing plasma damage effect
  • MOS capacitor capable of reducing plasma damage effect

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Experimental program
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Embodiment Construction

[0020] The gate metal pad P has a first layer of wire W11, a second layer of wire W12, a third layer of wire W13, ..., a top layer of wire TW1, the first layer of wire W11 is located in the first layer of metal In M1, the top-layer wire TW1 is located in the top-layer metal TM of the metal layer M. In addition, the wire layers of the gate metal pad P are connected through contact hole plug layers.

[0021] The first layer wire W11 of the gate metal pad P is separated into first and second wire segments W111 and W112, the first wire segment W111 is electrically connected to the second layer wire W12 of the gate metal pad P located above, The second wire segment W112 is electrically connected to the gate G located below, and the metal jumper MJ is straddled between the first and second wire segments W111 and W112, and the metal jumper MJ has a first-layer wire W21, The second-layer wire W22, ..., the top-layer wire TW2, the first-layer wire W21 is located in the second-layer met...

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Abstract

The invention provides an MOS capacitor capable of reducing plasma damage effect. The MOS capacitor is made on a silicon substrate, and comprises a grid and a grid metal pad that is arranged in a metal layer and connected with the grid. In the prior art, the grid metal pad has no metal jumper. Along with continuous reduction of the minimum characteristic size and grid oxide thickness, plasma damage is easy to generate on a grid oxide as a result of plasma damage effect during production of the grid metal pad, thereby having adverse effect on quality and reliability of the MOS capacitor. The grid metal pad is divided into an upper part and a lower part from a lead of the first layer which is divided into a first lead segment and a second lead segment respectively connected with the upper part and the lower part; and the metal jumper is arranged between the first lead segment and the second lead segment in a crossing way. The invention can greatly improve the quality and reliability of the MOS capacitor.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a MOS capacitor capable of reducing plasma damage effects. Background technique [0002] In the field of semiconductor manufacturing, plasma is used in many processes such as etching process, ion implantation process and chemical vapor deposition process. In theory, the total external electrical property of plasma should be neutral, that is to say, positive ions and negative ions It is the same amount, but in fact, the positive and negative ions entering the wafer are not equal in local areas, so a large amount of free charges will be generated. Conductors such as metal wires or polysilicon (polysilicon) in the wafer are like antennas, which can collect these free charges. The longer the antennas, the more charges they collect. When the collected charges reach a certain level, they will Discharge, the above phenomenon is commonly referred to as the plasma damage effect...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/94H01L29/78
Inventor 陆黎明赵永
Owner SEMICON MFG INT (SHANGHAI) CORP