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Metal gate structure for MOS device and production method thereof

A technology of metal gate and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of increasing EOT of metal gate structure, affecting the overall performance of MOS devices, etc., to meet performance requirements, low Defects, small EOT effects

Inactive Publication Date: 2009-12-09
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This problem will lead to an increase in the EOT of the entire metal gate structure, and ultimately affect the overall performance of the MOS device

Method used

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  • Metal gate structure for MOS device and production method thereof
  • Metal gate structure for MOS device and production method thereof
  • Metal gate structure for MOS device and production method thereof

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Embodiment Construction

[0026] In order to make the purpose, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0027] According to the technical solution provided by the present invention, in the process of forming the metal gate structure, when forming SiO 2 After the interface layer and the high-k gate dielectric layer, instead of using the PDA (post deposition annealing, post-deposition annealing) process in the traditional way, the PMA (post metallization annealing, post-metallization annealing) process is used after depositing the metal gate material layer , so as to achieve a high-quality, low-defect metal gate structure, which avoids the 2 The problem of increasing the EOT of the entire metal gate structure caused by the thickening of the interface layer can meet the performance requirements of the corresponding MOS device...

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Abstract

The invention discloses a metal gate structure for an MOS device and a production method thereof, which belong to the technical field of MOS devices in microelectronic technology. The method comprises the steps of: forming an interface layer on a substrate; forming a high dielectric constant gate dielectric layer on the interface layer; forming a metal gate material layer on the high dielectric constant gate dielectric layer; and performing post-metallization annealing treatment on the interface layer, the high dielectric constant gate dielectric layer and the metal gate material layer to form the metal gate structure. The method can form the high-quality and low-defect metal gate structure by performing post-metallization annealing treatment on the metal gate structure, and prevent oxygen from being diffused to an SiO2 / Si interface and substrate silicon to react to form SiO2 during the annealing, thereby ensuring that an equivalent oxide layer of the whole metal gate structure keeps smaller thickness to meet the performance requirement of the MOS device.

Description

technical field [0001] The invention relates to the field of MOS (metal oxide semiconductor) devices in microelectronic technology, and more particularly relates to a metal gate structure for MOS devices and a manufacturing method thereof. Background technique [0002] With the rapid development of microelectronics technology, the application of key core technologies of 32 / 22nm process integrated circuits is an inevitable trend in the development of integrated circuits, and it is also the focus of research and development by major international semiconductor companies and research organizations. The MOS device gate engineering technology centered on "high dielectric constant (high-k) gate dielectric / metal gate" technology is the most representative key core process in 32 / 22 nanometer technology, so the related materials, processes and Structural development is extensive. [0003] For MOS devices with a high-k / metal gate structure, a very important parameter is the equivalen...

Claims

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Application Information

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IPC IPC(8): H01L21/336H01L21/283H01L29/78H01L29/49
Inventor 王文武陈世杰陈大鹏
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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