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Ion doping method of memory cell in dram

An ion doping, memory cell technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as poor surface adhesion of silicon substrates

Active Publication Date: 2011-11-30
SEMICON MFG INT (SHANGHAI) CORP
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  • Description
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Problems solved by technology

[0005] The technical problem to be solved by the present invention is to provide an ion doping method for memory cells in DRAM to solve the problem of poor adhesion between photoresist and doped structure word line sidewalls and silicon substrate surface in the ion doping process of traditional memory cells

Method used

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  • Ion doping method of memory cell in dram
  • Ion doping method of memory cell in dram
  • Ion doping method of memory cell in dram

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Embodiment Construction

[0022] see figure 1 , the ion doping method of memory cell in DRAM of the present invention, wherein, memory cell has active region 11, and active region 11 is made in silicon substrate 1, and silicon substrate 1 is made with several word lines 2 of doping structure. Ion doping method of the present invention comprises the following steps:

[0023] Step 1 see Figure 1~2 , oxidation figure 1 The surface and sidewall of the word line 2 with the doping structure shown, and the surface of the silicon substrate 1 between the word lines 2 with the doping structure. A thin layer of oxide 4 is formed on the entire surface of the memory cell device. see figure 1 The doped structure word line 2 includes a gate structure word line layer 23, a word line ohmic contact layer 22 and a word line mask layer 21 which are sequentially located on the surface of the active region of the silicon substrate 1; the gate structure word line layer 23 includes a layer which is sequentially located ...

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Abstract

The invention relates to an ion doping method for a storage unit in a DRAM. The storage unit has an active area made in a silicon base and several doped structure word lines located on the surface of the active area of ​​the silicon base. The method comprises the following steps: 1: oxidize the surface of the doped structure word line, the side wall and the surface of the silicon substrate between the adjacent doped structure word lines; 2: oxidize the surface of the doped structure word line and the oxidized silicon Coating photoresist on the surface of the substrate; 3: the photoresist on the surface of the oxidized silicon substrate to be doped between the word lines of the doped structure; The active region in the silicon substrate between the heterostructure word lines. The present invention directly oxidizes the surface of the storage unit before coating the photoresist to improve its adhesion to the photoresist and the uniformity of the photoresist, and solve the problem of poor adhesion between the photoresist and the surface of the storage unit in the traditional doping method, and The problem of decreased refresh time of DRAM due to poor adhesion.

Description

technical field [0001] The invention relates to the field of manufacturing methods of dynamic random access memory (hereinafter referred to as DRAM), in particular to an ion doping method of memory cells in DRAM. Background technique [0002] With the development of the DRAM integrated manufacturing process, the critical dimension (Critical Dimension, CD) of each storage cell capacitor in the DRAM is also continuously reduced. The continuous shrinking of the size of the capacitor CD means that the capacitance value of the storage unit will continue to shrink. The development goal of DRAM market competition is to require the continuous increase of DRAM refresh time (Refresh Time) in order to reduce the refresh frequency of DRAM. However, the reduction of the capacitance value of DRAM storage unit runs counter to the development requirements of DRAM. Therefore, as the CD value of the storage unit capacitance in DRAM decreases, in order to meet the development requirements of ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8242H01L21/266H10B12/00
Inventor 彭坤
Owner SEMICON MFG INT (SHANGHAI) CORP
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