High-speed 8B/10B coder, decoder and processing method thereof for error input

A technology of encoder and decoder, applied in the field of transmission coding of digital communication, which can solve problems such as long critical path

Inactive Publication Date: 2010-03-17
INST OF ACOUSTICS CHINESE ACAD OF SCI
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

U.S. Patent "8B / 10B Encoding AndDecoding for High Speed ​​Applications" with Publication No. 6977599 and U.S. Patent "5B / 6B-T, 3B / 4B-T and Partitioned 8B / 10B-T and 10B / 12B Transmission" with Publication No. 6911921 Codes, and Their Implementation for High Operating Rates" improves the speed of a single 8B / 10B encoder and decoder by improving the circuit structure, but it mainly uses combinational logic to implement encoding and decoding, which has a deep logical depth, resulting in a critical path Too long, which affects the speed of the 8B / 10B encoder and decoder to a certain extent, and the implementation of the 8B / 10B encoder focuses on the encoding of data characters and DC balance control while ignoring the control characters and data characters DC balance problem of data flow during interval transmission

Method used

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  • High-speed 8B/10B coder, decoder and processing method thereof for error input
  • High-speed 8B/10B coder, decoder and processing method thereof for error input
  • High-speed 8B/10B coder, decoder and processing method thereof for error input

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Embodiment Construction

[0051] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0052] Such as image 3The shown 8B / 10B encoder includes a two-stage pipeline, wherein the first-stage pipeline includes a data character pre-coding module, a control character pre-coding module, and an RD_turn calculation module for data and control characters; the second-stage pipeline includes: data character pre-coding Correction module, control character code correction module, RD calculation module, data / control character selection module. The data character precoding module and the data character precoding correction module respectively perform 5B / 6B and 3B / 4B precoding and correction on the data characters. The input eight-bit data HGFEDCBA is sent to the three modules of the first-level pipeline through the register, and the input one-bit control character Kin is sent to the RD calculation module in the second-level pipeline through t...

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Abstract

The invention provides a high-speed 8B / 10B coder, a decoder and a processing method thereof for error input. The coder comprises a data character precoding module, a RD calculating module and a data character precoding correction module, and the coder adopts a pipeline structure and a parallel processing method; the data character precoding module, the data character precoding correction module and the RD calculating module are respectively precoded and then post collected; the data character precoding module precodes input data in first-stage flow water, and calculates whether the current input code word can cause RD to turn by a RD_turn module; the RD calculating module calculates a RD value passing through the code word in second-stage flow water, and calculates the obtained RD value by using the former clock period to correct the precoded result of the current code word. The invention respectively adopts the pipeline structure and the parallel processing method when being applied in a high-speed serial interface, thus simplifying the circuit design, shortening the key path and improving speed.

Description

technical field [0001] The present invention relates to the technical field of digital communication transmission coding, in particular to a high-speed 8B / 10B encoder and decoder and its processing method for error input, that is, a high-speed (>1Gbps) 8B / 10B encoder and decoder and its logic Implementation. Background technique [0002] The 8B / 10B transmission coding was proposed by Albert X. Widmer and Peter A. Franaszek in the US patent "Byte Oriented DC Balanced (0, 4) 8B / 10B Partition Block Transmission Code" with publication number 4486739 in 1983. The transmission coding has the characteristics of small transmission bandwidth, high conversion density, limited code word run length, and multiple edge transitions in each code word, so it is easy to quickly synchronize alignment and DC balance. DC balance means that the number of "0" and "1" of the encoded data is basically consistent, which can avoid the DC drift of the input of the receiver, so that it is possible t...

Claims

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Application Information

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IPC IPC(8): H03M5/14
Inventor 王东辉王琪华斯亮侯朝焕张铁军
Owner INST OF ACOUSTICS CHINESE ACAD OF SCI
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