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P-type super-junction laterally double diffused metal oxide semiconductor

A technology of oxide transistors and lateral double diffusion, applied in semiconductor devices, electrical components, circuits, etc., to achieve the effects of reducing on-resistance, improving device performance, and increasing breakdown voltage

Inactive Publication Date: 2010-07-14
SOUTHEAST UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, due to the influence of substrate-assisted depletion factors in the current super-junction lateral double-diffused semiconductor metal oxide transistors, there is still room for improvement in performance. The present invention proposes an improved structure super-junction lateral double-diffused semiconductor metal oxide transistor

Method used

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  • P-type super-junction laterally double diffused metal oxide semiconductor
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  • P-type super-junction laterally double diffused metal oxide semiconductor

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Embodiment Construction

[0019] Attached below figure 1 , the present invention is described in detail, a P-type superjunction lateral double-diffused semiconductor metal oxide transistor, comprising: an N-type substrate 1, a superjunction structure and an N-type body region 2 are arranged on the N-type substrate 1, the superjunction The junction structure is composed of P-type regions 11 and N-type regions 12 distributed alternately in the direction of connecting the source and drain regions. A P-type source region 4, an N-type body contact region 5 and a gate oxide layer 3 are arranged above the N-type body region 2. A P-type drain region 14 is provided above the super-junction structure, a first-type field oxide layer 10 is provided above the super-junction structure and outside the P-type drain region 14, and a polysilicon gate 6 is provided above the gate oxide layer 3. A second-type field oxide layer 8 is arranged above the P-type source region 4, the N-type body contact region 5, the P-type dr...

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Abstract

The invention discloses a P-type super-junction laterally double diffused metal oxide semiconductor, comprising an N-type substrate. A super-junction structure and an N-type body region are arranged on the N-type substrate; the super-junction structure consists of a P-type region and an N-type region which are alternately distributed and are connected to the direction of the source region and the drain region; a P-type source region, an N-type body contact region and a gate oxide layer are arranged above the N-type body region; a P-type drain region is arranged above the super-junction structure; a first type field oxide layer is arranged at the region out of the P-type drain region and above the super-junction structure; a polysilicon gate is arranged above the gate oxide layer; a second type field oxide layer is arranged over the P-type source region, the N-type body contact region, the P-type drain region, the polysilicon gate and the first type field oxide layer; and metal lead wires passing through the second type field oxide layer are connected to the P-type source region, the N-type body contact region, the P-type drain region and the polysilicon gate. The semiconductor is characterized in that the N-type substrate is internally provided with a P-type buffer area, and the P-type buffer area is located below the N-type region in the super-junction structure and connected with the bottom of the N-type region in the super-junction structure.

Description

technical field [0001] The invention relates to the field of power semiconductor devices, and relates to a structure of a superjunction lateral double-diffusion semiconductor metal oxide transistor suitable for high-voltage applications. Background technique [0002] With the increasing demand for energy saving, the performance of power integrated circuit products has attracted more and more attention, and the power loss of the circuit is undoubtedly one of the most important performance indicators. In addition to the circuit structure and design of the power integrated circuit itself, the factors that determine the power loss of the power integrated circuit, the manufacturing process used in the circuit, and the performance of the power devices used are the key to the power loss of the power integrated circuit. [0003] At present, according to the manufacturing process of power integrated circuits, it is mainly divided into bulk silicon-based, epitaxy and silicon-on-insula...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/06
Inventor 孙伟锋孙大鹰徐申钱钦松陈越政陆生礼时龙兴
Owner SOUTHEAST UNIV
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