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Method used for realizing union of bit synchronization and filtering of high-speed digital communication system

A technology of a digital communication system and an implementation method, which is applied in the field of joint realization of bit synchronization and filtering, can solve the problems of inability to demodulate output in real time, disadvantageous time domain bit synchronization, etc., and achieve real-time data output, reduce calculation amount, and save hardware resources Effect

Inactive Publication Date: 2012-09-05
BEIJING INSTITUTE OF TECHNOLOGYGY
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Problems solved by technology

[0006] The purpose of the present invention is to solve the problem that the existing frequency domain bit synchronization technology cannot demodulate the output in real time, and the time domain bit synchronization technology is not conducive to resource and data multiplexing, and propose a combination of bit synchronization and filtering suitable for high-speed digital communication systems Implementation

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  • Method used for realizing union of bit synchronization and filtering of high-speed digital communication system
  • Method used for realizing union of bit synchronization and filtering of high-speed digital communication system
  • Method used for realizing union of bit synchronization and filtering of high-speed digital communication system

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Embodiment Construction

[0050] In order to better illustrate the purpose and advantages of the present invention, the present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0051] This specific implementation manner takes the most commonly used QPSK receiver as an example.

[0052] Set the QPSK modulation and demodulation system parameters as follows: symbol rate f 0 =10MHz; the data length at the sending end is 5200 symbols, the interpolation multiple P=8, the length of each segment L=416 points, and one segment actually corresponds to 52 symbol periods; the filtering part uses two roll-off coefficients α =0.35, FIR square root raised cosine filter (frequency domain coefficient is H(K)) of order M=49 is divided into sending end and receiving end, then N=L+2(M-1)=512 points; The machine A / D sampling rate is 8 times of the symbol rate, namely f s =80MHz.

[0053] The transmitter processing steps are as follows:

[0054] Step 1. D...

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Abstract

The invention relates to a method used for realizing bit synchronization and filtering union of a high-speed digital communication system, belonging to the modulation-demodulation technical field in the digital communication. By adopting a bit synchronization module and a multiplex FFT unit of a filter and adopting the data output mode of the filter, namely, the two operations of the filtering and the bit synchronization of a receiving terminal can be completed by once FFT operation, and by the assisting of the data striping scheme matched with method, the method can realize efficient and real-time data output; the bit synchronization module is infused into a filtering module of a demodulation system, so as to achieve the effects of greatly reducing the computation workload of the demodulation system and saving the hardware resource and improve the working efficiency of the demodulation system; in addition, the method can be used for outputting data at real time and is particularly suitable for the occasion with higher requirement on the transmission speed, such as the high-speed digital communication system.

Description

technical field [0001] The invention relates to a joint realization method of bit synchronization and filtering for a high-speed digital communication system, belonging to the technical field of modulation and demodulation in digital communication. Background technique [0002] In a high-speed digital communication system, in order to ensure that the phase of the signal obtained by the receiver does not drift due to the asynchronous clocks at both ends of the receiver, and to recover the sent binary symbol sequence correctly, an efficient and accurate bit synchronization method is required. However, multi-bit synchronization methods often have high complexity, and the higher the performance of the method, the greater the amount of calculation, which limits the operating rate of the communication system and is difficult to apply to high-speed occasions. This is the effectiveness and reliability of the communication system. Sexual contradictions. Therefore, it is necessary to...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L7/00H04L25/49
Inventor 杨杰崔颂祺卜祥元刘策伦
Owner BEIJING INSTITUTE OF TECHNOLOGYGY
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