40 results about "Raised-cosine filter" patented technology

A apparatus linearizing and technique for linearizing a non-linear power amplifier used in a transmitter of, e.g., a TDMA mobile wireless telephone. Linearization of the non-linear amplifier by changing the shape of the input signal is performed when the input signal level is high, thus increasing efficiency or reducing power consumption at that time, albeit at the cost of increased inter-symbol interference (ISI). However, since the input signals at that time are at a high level, the increased ISI can be tolerated and adjacent symbols can still be distinguished from one another. The invention allows use of a non-linear power amplifier which typically enjoys a lower current consumption than that of a linear power amplifier, thus increasing the time between battery recharges and / or reducing the overall size of the wireless telephone device. The power amplifier is operated in a linear mode when transmitted power is low, thus allowing differentiation between adjacent symbols (i.e., improvement of ISI). At high input power, the power amplifier is used in its non-linear mode to reduce current consumption. The signal shape is changed by changing the parameters of the root raised cosine filters. When the input level is low, the existing, otherwise conventional filter's parameters are used. However, when the input power level is high, modified parameters are used. Switching between the two sets of filter parameters is preferably performed at baseband. Thus, a relationship between RRCF filter parameters and the amount of spectrum utilized by the transmitted signal is utilized, and RRCF filter parameters are adjusted based on a desired limitation to an output spectrum.

The present invention provides a novel symbol timing recovery method for VSB receivers. Systems are described that comprise a timing error detector (TED) that produces an exact symbol timing error even in the presence residual carrier phase offset, loop filter that controls the characteristics of acquisition and tracking of digital PLL loop, Voltage / Numerically Controlled Oscillator (VCO / NCO) that adjusts the sampling instant and phase, A / D converter that samples a continuous VSB input signal, and a interpolating squared root raised cosine filter that performs both matched filtering and a compensation of constant timing offset of quarter symbol caused by the invented TED. The timing error detector in this invention comprises an envelope detector, band pass filter, squaring block, high pass filter, and decimator. It uses both in-phase and quadrature-phase component of received VSB signal, is operated at twice of a symbol frequency F, and guarantees consistent symbol timing error signal resulting in the improvement of receiver's performance.

A wireless terminal capable of communicating with a wireless communication system comprised of a plurality of wireless terminals and a plurality of base stations. The wireless terminal selects a sequence from a group of certain sequences for random access. At least one sub-carriers on an uplink channel including at least one data channel is allocated for at least one random access channel. Each data channel includes a continuous set of data sub-carriers. The wireless terminal then filters the at least one random access channel by applying a Raised Cosine filter, maps the selected sequence to the at least one random access channel to generate a random access channel signal, and transmits the random access channel signal to a base station.

A radio receiver includes a low noise amplifier, a down conversion module, an analog to digital converter, and a digital demodulator. The digital demodulator is operably coupled to convert the digital low IF signals into inbound digital symbols and includes a baseband conversion module, a filtering module, a programmable equalizer, a CORDIC module, and a demodulation module. The programmable equalizer is operably coupled to equalize phase and frequency response of filtered digital baseband signals from the filtering module such that the phase and frequency response of the filtered digital baseband signals approximates phase and frequency response of a square root raised cosine filter to produce adjusted digital baseband signals. The CORDIC module is operably coupled to produce phase and magnitude information from the adjusted digital baseband signals. The demodulation module is operably coupled to produce the inbound digital symbols from the phase and magnitude information.

Aspects of a method and system for a radio data service (RDS) demodulator for a single chip integrated Bluetooth and frequency modulation (FM) transceiver and baseband processor are presented. Aspects of the system may include circuitry on a single chip that enables demodulation of an RDS signal, filtering of the RDS signal, and detection of binary bits in the filtered RDS signal. The filtered RDS signal may be generated by filtering the RDS signal based on a raised cosine filter, or a doublet filter. In general, the RDS signal may also be filtered by a filter that is a first, or greater derivative of a Gaussian filter in either the time or frequency domain. Aspects of the method may include demodulating the RDS signal, filtering the RDS signal, and detecting binary bits in the filtered RDS signal.

An apparatus includes an interleaver configuration for at least one of combining or separating odd and even channel groups to achieve channel density doubling; and an optical equalizer for suppressing inter symbol interference within the channels to provide intra-channel equalizing in the optical path, the equalizer being integrated into the interleaver. Preferably, optical equalizer and interleaver are integrated together as a single monolithic device, the optical equalizer includes a passband that has a dip in the channel center to achieve a raised-cosine filtering profile in the optical signal path to achieve inter-symbol interference ISI suppression, and the equalizer includes integration into the optical path of the interleaver to realize a monolithic device combining or separating odd and even channel groups to achieve channel density doubling. Preferably, also, the optical equalizer includes a first equalizer with half the depth of required ripple dips at both a first output port and an input port and a second equalizer with half the depth of required ripple dips at a second output port.

Aspects of a method and system for polar modulation with discontinuous phase are provided. In this regard, in-phase and quadrature-phase components may be generated from a modulated baseband signal, and the signal components may be utilized to generate a signal representative of the amplitude of the baseband signal. Furthermore, the signal components may be pulse shaped and the pulse-shaped components may be divided by the signal representative of the amplitude of the baseband signal. The resulting signals may be up-converted to RF, summed, and amplified, where the amplification may be controlled via a quantized representation of the signal representative of the amplitude of the baseband signal. In this regard, one or more bias points, and / or one or more binary weighted current sources coupled to one or more power amplifiers may be controlled. The pulse-shaping may comprise passing the signal components through a raised cosine filter.

A modulator being made small in size, low in costs, low in power consumption, small in heat generation and spurious signals. The modulator includes multipliers (101, 102) for code-modulating received transmission data (D(n), C(n)), and outputting the modulated data, a control channel gain factor signal generator (106) for generating a gain control signal, a control channel gain factor signal generator (107), and weighting coefficient setting signal generators (108, 109) for receiving the output of the complex-number computing section (120) and controlling the gains of the raised cosine filters (110 to 113).

The invention discloses a general 4FSK modem and a digital interphone capable of supporting multiple standards. The general 4FSK modem comprises a 4FSK general modulator and a 4FSK general demodulator, the 4FSK general modulator comprises a first rooted raised cosine filter, a shaping filter, a first switch and a double up-sampling module, and the 4FSK general demodulator comprises a second rooted raised cosine filter, a bit synchronizer, a frame synchronizer, a double down-sampling module, an anti-shaping filter, a second switch and a synchronous code selection module. A plurality of communication standards are integrated, the aim that the digital interphone is low in cost and supports multiple standards is achieved, and the size of the present interphone is not increased.

The invention provides a RFID reader capable of increasing forward anti-interference function. A forward link includes an encoding module, a waveform generation module, a filtering module and a DAC. The filtering module is a Raised Cosine Filter which is implemented by look-up table in a FPGA. The method for implementing the Raised Cosine Filter includes the following steps: 1. on the basis of the modulation method of a RFID reader and the rate of outputting a baseband signal by the encoding module, taking a corresponding a step value from a step value ROM table; 2. if the rising edge or falling edge of forward data which is output by the waveform generation module is detected, starting to look up a filtering parameter ROM table, acquiring a filtering parameter, wherein the step value is one look-up parameter in the filtering parameter ROM table; and 3. on the basis of filtering parameter, setting the Raised Cosine Filter. According to the invention, the RFID reader has the characteristics of reduced bandwidth of baseband signals, sufficient capability of channel transmission, and reduced intersymbol interference.

The invention discloses an anti-frequency offset DMR interphone signal rapid identification method, which comprises the following steps: after monitoring and finding out a suspected signal of a DMR interphone, carrying out integer multiple and decimal multiple extraction on baseband data, carrying out root raised cosine filter, FM demodulator and frequency offset component pre-compensation, and carrying out normalized correlation on a plurality of locally reserved voice synchronization signals; and finally, judging whether the signal is a DMR interphone signal or not through a threshold. According to the method, the receiving range of the equipment to the signal frequency offset is enhanced, and the identification probability of the DMR interphone is improved. The method solves the problem that the DMR detection probability is reduced when the frequency offset exists, and is suitable for the field of wireless communication.

A timing recovery loop in the front end of a digital receiver includes a sample rate converter which receives a symbol stream at a first sampling rate and outputs the symbol stream at a second sampling rate responsive to a timing recovery (TR) control signal, a forward equalizer generating an equalized feedback signal based on the symbol stream at the second sampling rate, and a timing recovery circuit generating the TR control signal based upon the equalized feedback signal. If desired, the timing recovery loop may include a carrier recovery circuit electrically coupling the sample rate converter to the forward equalizer and a finite impulse response (FIR) filter electrically coupling the carrier recovery circuit to the forward equalizer. In an exemplary case, the FIR filter is a square-root raised cosine filter. A method for controlling the timing recovery loop based on the equalized feedback signal and a corresponding timing recovery control signal are also described.

The invention relates to a signal processing method suitable for a high-sensitivity space-borne ADS-B receiver, belonging to the field of aviation surveillance technology, including S1: the ADS-B signal received by the antenna is demodulated by radio frequency to obtain an intermediate frequency signal, and the digital signal after digital-to-analog conversion Down-conversion demodulation to obtain digital baseband signals; S2: low-pass filtering: preliminary filtering of out-of-band noise; S3: coarse synchronization detection, extracting coarse synchronization signal segments; S4: coarse frequency / phase offset estimation and compensation; S5: raised cosine filtering Device: improve signal-to-noise ratio; S6: fine synchronization detection, extracting fine synchronization signal segment; S7: non-coherent demodulation, if it passes the verification, then output ADS-B message; if not, then implement step S8; S8: carry out Precise frequency / phase offset estimation and compensation, and coherent demodulation, if the verification is passed, an ADS‑B message will be output; if it fails, the data will be discarded. The method has high detection rate, low false alarm rate and high decoding success rate.

The invention discloses a multi-carrier accomplishing method and device of time-division synchronization code division multiple access system. The method comprises: modulating downlink single speed time domain signal to frequency domain signal through quick Fourier transform, performing spectrum shift and rooted raised cosine filter for frequency domain signal, then performing reverse quick Fourier transform to produce downlink N carrier time domain signal, interpolating the downlink N carrier time domain signal to produce K speed signal then low pass filtering. The inventive TD-SCDMA multi-carrier accomplishes combination on DSP, so a radio frequency can accomplish multi-carrier function. Multi-carrier filtering separately accomplish on DSP and FPGA, DSP can accomplish RRC filtering, FPGA can accomplish low pass filtering. Transmission time delay controls digital signal and continuous phase of frequency domain which enables high precision algorithm and low complexity.

The invention discloses a non-data auxiliary frequency offset estimation method applicable to amplitude phase shift keying and relates to the technology of digital communication system receiving end processing. Frequency offset estimation and compensation are carried out on APSK signals by a receiving end. According to the method, the precision of carrying out the frequency offset estimation and compensation on the APSK signals by the receiving end is improved. The method comprises the steps of processing receiving signals by a rooted raised cosine filter and carrying out synchronization processing on the signals, wherein the synchronization processing comprises timing synchronization, frequency synchronization and phase synchronization processing. According to the method, for the frequency synchronization processing, frequency offset coarse estimation is carried out through utilization of an M&M algorithm according to a frequency range of the APSK signals, a frequency offset range is reduced, n times of frequency offset fine estimation is carried out through selective utilization of a Fitz algorithm according to a precision demand, and finally a precise frequency offset value is obtained. After the synchronization processing is carried out, judgment, constellation graph demapping and output are carried out. The invention provides an effective solution scheme for the APSK signal frequency offset estimation and compensation.