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Semiconductor package having marking layer

A semiconductor and mold cavity technology, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problem of unacceptable failure rate of ultra-thin devices, and achieve the effect of maintaining accurate thinness

Inactive Publication Date: 2010-12-22
TEXAS INSTR INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, conventional methods of incorporating device symbology for packaged wire-bonded chips into the encapsulation compound surface can lead to unacceptable failure rates for ultra-thin devices

Method used

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  • Semiconductor package having marking layer
  • Semiconductor package having marking layer
  • Semiconductor package having marking layer

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0027] figure 1 A semiconductor device generally designated 100 is shown as an embodiment of the invention. The assembled semiconductor chip 101 is encapsulated in a polymer compound 120 . On the top surface of the compound 120 is a sheet 130, preferably made of a polymeric material (see below), attached to the encapsulating compound 120 and in continuous contact with said compound. The sheet 130 has a bare and generally flat surface 130a. Such as figure 1 As indicated, the encapsulating compound shares a boundary 131 with the sheet 130 .

[0028]The polymeric material of flake 130 is selected to provide a flake having a first optical reflectivity and a first color. When a pulse of energy, such as a pulse of focused laser light, or another high-intensity light source impinges on a spot 133 of the sheet 130, the energy is absorbed by the material of the spot (primarily as thermal energy), thereby increasing the temperature. The polymeric material locally alters its chemic...

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PUM

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Abstract

The symbolization of a semiconductor device (100) is incorporated in a thin sheet (130) attached to the top of the device, facing outwardly with its bare surface. The material of the sheet (about 1 to 10 [mu]m thick) includes regions of a first optical reflectivity and a first color, and regions (133) of a second optical reflectivity and a second color, which differ from, and contrast with, the first reflectivity and color. Preferred choices for the sheet material include the compound o-cresol novolac epoxy and the compound bisphenol-A, more preferably with the chemical imidazole added to the film material. A preferred embodiment of the invention is a packaged device with a semiconductor chip a (101) connected to a substrate (102); the connection is achieved by bonding wires (111) forming an arch with a top 111a. The chip, the wire arches, and the substrate are embedded in an encapsulation material (120), which borders on the attached top sheet so that the arch tops touch the border (131).

Description

technical field [0001] The present invention relates generally to the field of semiconductor devices and processes; and more particularly to the structure and fabrication of packages having a visible marking layer for providing readable markings, but excluding package integrity. Background technique [0002] In the process flow of packaging a semiconductor chip into a complete device, often the last step is the symbolic representation of the device. This step records the information that the user needs to know to enable proper identification and use of the device. Examples include device type and model, manufacturer, key performance characteristics, and date. Typical symbolic representation elements include numbers, letters, trademark symbols, punctuation marks, arrows, and similar readable designations. Among the most popular symbology techniques are: ink embossing letter sizes as small as 0.8mm high and laser marking letter sizes as small as 0.56mm high. [0003] In ink...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/544H01L23/00
CPCH01L2924/01032H01L2924/01082H01L23/544H01L23/3128H01L2223/54486H01L2224/97B41M5/26H01L2924/15311H01L2223/5448H01L2924/01029H01L2224/48091H01L2224/32225H01L24/97H01L2224/85H01L2224/2919B41M5/24H01L24/85H01L2223/54406H01L2224/73204H01L24/48H01L2924/01079H01L21/565H01L2224/48227H01L2924/14H01L2924/01033H01L2924/01006H01L2924/10329H01L2924/01074H01L24/16H01L2224/16225H01L2223/54433H01L2224/73265H01L24/31H01L2224/04042H01L2224/0554H01L2224/05568H01L2224/05573H01L2924/00014H01L2924/181H01L2224/83H01L2924/0665H01L2924/07025H01L2924/00H01L2224/05599H01L2924/00012H01L2224/45099H01L2224/45015H01L2924/207H01L2224/0555H01L2224/0556
Inventor 阿野一章李文瑜
Owner TEXAS INSTR INC
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