Control method of lockup clutch state collecting circuit
A state acquisition and state control technology, which is applied in the application of locks, building locks, electric number locks, etc., can solve the problems of high power consumption and susceptibility to external electromagnetic interference, achieve low power consumption, enhance practicability, and reduce dependent effect
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Embodiment 1
[0033] Example 1: Such as figure 1 As shown, the circuit structure of the lock and clutch state acquisition circuit is as follows: the switch state acquisition circuit includes a switch S1, a first NMOS tube MR1, a second NMOS tube MR2, a third NMOS tube MR3, a fourth NMOS tube MR4, a PMOS tube T1, and a triode. T2, the fifth NMOS tube T3, the power battery B1, the trigger D1 and the DC-DC voltage conversion circuit.
[0034] Combine figure 1 The connection mode of each device and port is as follows: The power supply battery B1 is connected to the overall circuit from the outside; after the gate and drain of the first NMOS transistor MR1 are connected, it is connected to the positive electrode of the battery B1; The source of the NMOS transistor MR1 is connected to the first terminal a of the switch S1; the gate and drain of the second NMOS transistor MR2 are connected to the second terminal b of the switch S1; the second NMOS transistor MR2 The source is connected to the ground;...
Embodiment 2
[0041] Example 2: Such as image 3 As shown, a lock-clutch state acquisition circuit includes a lock-clutch signal switch (S1), a first resistor R1, a second resistor R2, a third resistor R2, a fourth resistor R4, a PMOS transistor T1, a triode T2, and a fifth NMOS The tube T3, the power supply battery B1, the trigger D1 and the direct current-direct current (DC-DC) voltage conversion chip, the first resistor R1 is connected to the first end a of the lock clutch signal switch S1, and the second resistor R2 is connected to the lock clutch The second terminal b of the signal switch S1 is connected; the base of the transistor T2 and the drain of the PMOS transistor T1 are connected through a third resistor R3; the source and gate of the PMOS transistor T1 are connected through a fourth resistor R4; The source of the PMOS transistor T1 is connected to the positive electrode of the power battery B1; the source of the PMOS transistor T1 is connected to the first end a of the lock and ...
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