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Method for improving interface feature of gate medium having high dielectric constant

A technology with high dielectric constant and interface characteristics, applied in circuits, electrical components, semiconductor devices, etc., can solve problems affecting device process performance, reduce defects and charges, improve quality, and improve interface characteristics.

Active Publication Date: 2012-09-05
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] For the above processes, since the processing processes of the interface layer, high-k gate dielectric layer, and metal gate are carried out in different equipment, many impurities and pollution may be introduced during the transfer process between processes, which will greatly The influence of the process performance of the device, especially the interface characteristics

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  • Method for improving interface feature of gate medium having high dielectric constant
  • Method for improving interface feature of gate medium having high dielectric constant
  • Method for improving interface feature of gate medium having high dielectric constant

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Embodiment Construction

[0027] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0028] Step 1: If figure 1 As shown, on a semiconductor substrate (such as Si, Ge, GeSi, GaAs, InP, etc.) x ) or oxygen (O 2 ) or ozone (O 3 ) method of indirect plasma assisted oxidation to grow 0.5nm thick SiO 2 Interface layer (film thickness ranging from 0.2 to 1.0 nm, preferably 0.2 to 0.8 nm, optimally 0.2 to 0.7 nm).

[0029] Step 2: If figure 2 As shown, in the same environment where the interface layer was grown, nitrogen (N 2 ) or ammonia (NH 3 ) method of indirect plasma assisted nitriding to nitriding the interface layer. The maximum power of the indirect plasma is 600W.

[0030] Step 3: If image 3 As shown, in the same environment where the interface layer was grown, a high-k gate dielectric film H...

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Abstract

The invention discloses a method for improving interface feature of gate medium having high dielectric constant. The method is as follows: continuously preparing an insulation interface layer and a gate medium layer having high dielectric constant under the same processing environment in the processing technique of MOS component. By using the method disclosed by the invention, the shortcomings and the electric charge between the high k gate medium layer and the interface layer caused by environmental pollution can be reduced and the quality of high k gate medium layer can be increased.

Description

technical field [0001] The invention relates to the technical field of high-k gate dielectric and metal gate structure in nanometer-scale CMOS process technology, in particular to a method for improving the interface characteristics of high dielectric constant (that is, high-k) gate dielectric. Background technique [0002] The application of key core technology of 22nm and below technology CMOS process integrated circuit is an inevitable trend in the development of integrated circuits, and it is also one of the topics that major international semiconductor companies and research organizations are competing to develop. CMOS device gate engineering research centered on "high-k / metal gate" technology is the most representative key core process in 22nm and below technologies, and related material, process and structure research has been extensively carried out. [0003] For a CMOS device with a high-k gate dielectric / metal gate structure, the quality of the high-k gate dielectr...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L21/28H01L21/283
Inventor 王文武陈世杰王晓磊韩锴陈大鹏
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI