Semiconductor device structure and manufacturing method thereof

Abstract

The invention provides a semiconductor device structure and a manufacturing method thereof. The semiconductor device structure comprises a semiconductor substrate, a plurality of insulating layers, a plurality of metal wiring layers, conductive plugs in a device region and conductive plugs in a virtual region, wherein the semiconductor substrate is divided into the device region and the virtual region; the virtual region is arranged on the edge of the semiconductor substrate; one insulating layer is arranged on the semiconductor substrate; the metal wiring layers are formed among the insulating layers; the conductive plugs in the device region are arranged in each insulating layer and penetrate through the insulating layer in the thickness direction, and are used for connecting the metal wiring layers; and the conductive plugs in the virtual region are arranged in one insulating layer and penetrate through the insulating layer in the thickness direction, and are used for directly connecting any metal wiring layer with the semiconductor substrate. The invention has the following advantage: the electric charges accumulated in the metal wiring layers and the insulating layers during etching are timely released, thus avoiding lattice defects and device damage caused by residual electric charges.

Description

technical field [0001] The present invention relates to the field of manufacture of semiconductor devices, in particular to a structure of a semiconductor device for releasing accumulated charges through a dummy conductive plug connected to a semiconductor substrate and a method for manufacturing the same. Background technique [0002] With the rapid development of ULSI (Ultra Large Scale Integration) technology, miniaturization of the wiring design principles of semiconductor devices is progressing. The number of components to be integrated is increasing, the wiring of large-scale integrated circuits is more complex, and the metal wiring is becoming thinner, narrower, and thinner. In this case, multi-layer interconnection has attracted attention, and contact hole conductive plug deposition is a key interconnection technology. Interconnect technology plays a key role in improving product yield. [0003] At present, when manufacturing semiconductor products, a common interc...

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Problems solved by technology

[0009] In the existing process of forming interconnection lines, when the conductive plug is formed by etching, the residual charge brought by plasma etching will gradually accumulate in the metal wiring layer, and the discharge phenomenon will be excited under certain conditions, resulting in Discharge occurs between the metal wiring layer and the semiconductor substrate, making the test invalid

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