Optical logic gate based on double parallel microring resonators

Abstract

The invention discloses an optical logic gate based on double parallel microring resonators. The optical logic gate is realized by two parallel microring resonators (MRR) and waveguides of two parallel namometer wires, two inputs are electric pulse sequences to be calculated, and calculated results to be output are optical pulse sequences. By the optical logic gate, the problems of speed bottleneck, power consumption and gate delay and competition and risks brought by the gate delay in a traditional electric logic gate are solved, the optical information processing and the speed of information processing in optical calculation are improved, and the small volume, low power consumption and low cost of devices can be guaranteed.

Description

technical field [0001] The present invention relates to the technical field of optical information processing and optical computing, in particular to an optical logic gate based on a parallel double microring resonator, in particular, the optical logic gate uses a compact silicon-based integrated microring resonator The device realizes the logic operation function. Background technique [0002] With the development of science and technology, people's living standards continue to improve, and the amount of information to be processed in people's daily life has greatly increased, such as: video conferencing, videophone, smart home, Internet of Things, etc. In this way, the information processing and calculation of traditional electronics have great disadvantages both in terms of power consumption and speed. Optical information processing and optical computing, as one of the most effective ways to replace electrical information processing and computing, has attracted more and ...

AI Technical Summary

Problems solved by technology

[0008] In view of this, the main purpose of the present invention is to provide a kind of optical logic gate based on parallel double microring resonators, to solve the speed bottleneck, power consumption, gate delay and the delay caused by the gate delay in the traditional electrical logic gate The problem of competition and risk-taking, to achieve the purpose of improving the speed of information processing in optical information processing and optical computing, and to maintain the small size, low power consumption and low cost of the device

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