Method for writing to resistance-change non-volatile memory elements, and resistance-change non-volatile memory device
A non-volatile storage, resistance-variable technology, applied in electrical components, information storage, static memory, etc., to achieve the effects of high-speed readout, stabilization, and improved yield
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Embodiment approach 1
[0154] First, the writing method of the variable resistance element and the nonvolatile memory device in the first embodiment of the present invention will be described.
[0155] image 3 It is a graph showing an example of the current-voltage characteristics of the pulse voltage (Vp) and the cell current (Ir) accompanying the change in the resistance of the memory cell 105. figure 2 A voltage (=2.4V) is applied to the terminal G of the transistor 104 to turn on the transistor 104, figure 2 A resistance change pulse (0V→Vp→0V, pulse width 50ns) with the wiring S as a reference potential is applied between the wiring U-S, and the horizontal axis shows the value that causes the pulse voltage Vp to swing from a negative voltage to a positive voltage. In addition, the vertical axis shows the read current value. The read current value is the voltage applied to both ends of the resistance variable element 10a after applying a voltage based on the resistance change pulse, or the absolut...
Embodiment approach 2
[0354] Next, a method of writing a variable resistance element and a nonvolatile memory device in Embodiment 2 of the present invention will be described.
[0355] Such as Image 6 As in (c), even after the low-resistance stabilization writing is performed in the early stage immediately after the manufacture, the low-resistance state rarely changes to half LR. In this case, a wrong reading judgment may be made. One of the countermeasures is the use of error correction methods such as ECC, and the other is general non-volatile memory, verifying during writing, and performing additional writing (low Resistance stabilization writing) method. Here, a method of performing the latter check and additional writing (low resistance stabilization writing) will be described.
[0356] After the low-resistance writing is performed, the low-resistance state is determined, and the half-LR state, that is Image 6 (c) In the case of such an abnormal state, it is necessary to perform low-resistance...
Embodiment approach 3
[0386] Next, a method for writing a variable resistance element and a nonvolatile memory device in Embodiment 3 of the present invention that perform low-resistance stabilization writing using positive voltage pulses without using verification will be described.
[0387] Figure 7 (b), Figure 7 The data shown in (c) implies that even if the low-resistance stabilization writing immediately after manufacturing is performed, the subsequent low-resistance writing frequently becomes the half-LR state of characteristic type 2 The correction method described in the first embodiment described above cannot be eliminated, and even the correction method described in the second embodiment may cause a correction step almost every time.
[0388] The inventors of us have studied a method of correcting the half LR state of a memory cell having such frequent characteristic type 2 write characteristics to a low resistance state.
[0389] When paying attention Figure 7 The pulse V-I characteristic di...
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