A Spad Array Level Readout Circuit Using Quadratic Correlation Double Sampling Technology

Abstract

The invention discloses a SPAD array-level readout circuit adopting quadratic correlation double-sampling technology, which includes a CDS readout circuit and a sample-and-hold circuit. The first-stage CDS readout circuit consists of a voltage follower, two switch circuits and a sampling capacitor, which are connected to each column bus to ensure fast readout of the information of the pixel unit, and the information in the pixel unit Fixed pattern noise cancellation. The second-stage CDS readout circuit consists of 2 voltage followers, 2 switch circuits and 2 sampling capacitors, which are used to eliminate fixed pattern noise in the readout circuit. The quadratic correlation double-sampling array-level readout circuit only needs two control signals, and the timing signal is simple. The invention has the advantages of simple timing control and fast readout speed. The two-stage CDS only needs two control signals, and the readout speed is fast, which improves the working efficiency of the readout circuit. Therefore, it has obvious advantages in large-scale pixel array circuits.

Description

technical field [0001] The invention belongs to the field of optoelectronic technology, and relates to a correlated double sampling noise reduction readout circuit applied to a high-density single-photon avalanche diode array detector. Background technique [0002] Single-photon avalanche diodes (SPADs) have a wide range of applications in technical fields such as fluorescence lifetime imaging, Raman spectroscopy, and 3D imaging due to their high sensitivity and sub-second temporal resolution. At present, single-photon avalanche diodes are developing in the direction of low-cost, high-density, high-reliability deep-submicron CMOS process array image sensors. A SPAD array detector includes numerous SPAD pixel units and peripheral readout and control circuits, wherein each SPAD pixel unit is composed of a SPAD device, a quench reset circuit and a count readout circuit. The pixel readout voltage value measured by the analog counting method can reflect the number of detected ph...

AI Technical Summary

Problems solved by technology

Traditional correlated double sampling uses a fully differential amplifier as a sampling op amp, which requires a large integration capacitor and consumes a lot of power; while the CDS readout circuit designed using a transconductance amplifier requires more complex timing signals

Although the CDS readout circuit based on the current mirror structure can ensure a small occupied area and a relatively simple sequential circuit, the effective input range is small, and it cannot work effectively when the input range is large.

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