EEPROM erasing and writing method and device

Abstract

The invention relates to an electrically erasable programmable read-only memory (EEPROM) method, which comprises the following steps of: 1, controlling a charge pump circuit by using a column selected signal (V1) to realize column selection; and 2, controlling a high-level column selected signal (WL) by using a first logic signal to make the high-level column selected signal (WL) at least have voltage of the logic 1 so as to increase breakdown voltage, wherein the first logic signal is equal to the sum of a writing signal (W), a reading signal (R) and the column selected signal (V1). By the EEPROM erasing and writing device and the EEPROM erasing and writing method, the column selection is realized by the method of controlling the charge pump circuit, so the voltage on the WL at least has the level of the logic 1 to increase the breakdown voltage; moreover, the effectiveness of a clock is controlled by adding an NAND logic of the column selected signal (V1) onto the clock.

Description

technical field [0001] The present invention relates to the field of memory circuit design, and more particularly, to a method and device for erasing and writing EEPROM. Background technique [0002] Electrically Erasable Programmable Read Only Memory (EEPROM) A circuit used to store digital information. The structure of the floating gate device of EEPROM is as follows figure 1 shown, its circuit symbol is as follows figure 2 shown. A high voltage is applied to the control gate to perform an erase action, and the high voltage difference between the control gate and the drain causes electrons to tunnel to the floating gate. This causes the turn-on voltage of the device to become high. When the control gate is connected to zero potential, the source and drain terminals are not turned on, which is used to represent "1" of the digital signal. Applying a high voltage to the drain is a write action, and the high voltage difference between the drain and the control gate causes...

AI Technical Summary

Problems solved by technology

The main problem lies in the initial few working conditions, low breakdown voltage and large leakage current to the substrate, so when erasing and writing EEPROM with large storage capacity, there will be a large substrate leakage current in the initial few times, resulting in V2 load Too heavy to maintain the high voltage values ​​required for erasing and writing

This will cause the operation to fail

Moreover, after a long period of time without high voltage operation, the breakdown phenomenon will reappear.

[0005] In addition, when WL is zero, the clock of the charge pump circuit is still operating, increasing a certain amount of power consumption. At the same time, the M5 tube is turned off, and the charge pump will cause a negative voltage at the source of M5, which will cause leakage to the substrate.

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