Method for manufacturing semiconductor interconnection structure
An interconnection structure and semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problem of destroying the structure and shape of the dielectric layer, affecting the electrical performance of the device, and the k value of the dielectric layer Problems such as rising to achieve the effect of reducing damage, regular etching groove outline, and avoiding rising
Inactive Publication Date: 2011-08-10
SEMICON MFG INT (SHANGHAI) CORP +1
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Problems solved by technology
On the one hand, the damage increases the k value of the dielectric layer, which affects the electrical properties of the device. On the other hand, it destroys the structure and shape of the dielectric layer, thereby affecting the final groove profile.
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[0020] In the following description, a lot of specific details are given in order to provide a more thorough understanding of the present invention. However, it is obvious to those skilled in the art that the present invention can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present invention, some technical features known in the art are not described.
[0021] Figure 2A-2D The process of fabricating a copper interconnection layer according to an embodiment of the present invention is shown. Such as Figure 2A As shown, a dielectric layer 101 is covered by a CVD method on the previous interconnection layer or active device layer. The dielectric layer 101 is composed of a low-k material, an ultra-low-k material, or a combination thereof. In an example, the dielectric layer 101 includes a black diamond material BD (Black Diamond) and a nitrogen doped carbide NDC (Nitrogen Doped Carbide). More specifically, NDC uses ...
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Abstract
The invention discloses a method for manufacturing a semiconductor interconnection structure. The method comprises the following steps of: obtaining an intermediate structure of the semiconductor interconnection structure, wherein the intermediate structure at least comprises a dielectric layer which is formed by a low-k material and / or an ultra-low-k material and at least one photo-resist material, and etching a trench in the dielectric layer; performing hexamethyl disilazane (HMDS) processing on the intermediate structure; and removing the photo-resist material in the intermediate structure by using a plasma method. The invention also provides a semiconductor structure and a semiconductor device which are obtained by the method, and electronic equipment which comprises the semiconductor device. By the method for manufacturing the semiconductor interconnection structure, damage to the dielectric layer having an ultra-low k value in the conventional process can be reduced and the dielectric layer having the ultra-low k value in the conventional process can be repaired, and the interconnection structure having more excellent performance is obtained.
Description
Technical field [0001] The present invention relates to a semiconductor interconnect manufacturing process, and in particular to a method of manufacturing an interconnect structure capable of reducing damage to a low-k intermetal dielectric layer. Background technique [0002] The rapid development of semiconductor integrated circuit technology continuously puts forward new requirements on interconnection technology. As the size of semiconductor devices continues to shrink, interconnect structures have become narrower, resulting in higher and higher interconnect resistance. With its excellent conductivity, copper has now become one of the solutions for interconnection integration technology in the field of integrated circuit technology. Copper interconnection technology has been widely used in the 90nm and 65nm technology nodes. [0003] In the copper interconnection process, as the space between the metal connections gradually shrinks, the intermediate insulating layer (IMD) used...
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IPC IPC(8): H01L21/768H01L23/522
Inventor 孙武
Owner SEMICON MFG INT (SHANGHAI) CORP