Fan-out high-density packaging method

A packaging method and high-density technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problem of inappropriate multi-layer packaging structure, and achieve the effect of high density

Active Publication Date: 2011-08-17
NANTONG FUJITSU MICROELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In addition, the above method is not suitable for the manufacture of multi-layer packaging structures with complex wiring connections

Method used

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Embodiment Construction

[0026] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar extensions without violating the connotation of the present invention, so the present invention is not limited by the specific implementations disclosed below.

[0027] Secondly, the present invention is described in detail by means of schematic diagrams. When describing the embodiments of the present invention in detail, for convenience of explanation, the schematic diagrams are only examples, which should not limit the protection scope of the present invention.

[0028] The specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0029] Such as figure 1 with figure 2 As shown, in one embodiment of the prese...

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Abstract

The invention relates to a fan-out high-density packaging method, which comprises the following steps of: providing a carrier plate; forming a stripping membrane on the carrier plate; forming protective layers on the stripping membrane; forming a rewiring metal layer in the protective layers; forming wiring packaging layers which are conductive with the rewiring metal layer on the protective layers; forming inversion packaging layers on the wiring packaging layers, wherein the packaging layers are connected electrically and mutually by wiring layers and welding flux salient points; removing the carrier plate and the stripping membrane, so that rewiring metal in a first protective layer is exposed; and forming a metal welded ball on the exposed rewiring metal. Compared with the prior art, the fan-out high-density packaging method has the advantages that: a final packaging product with an integral systemic function instead of a single chip function can be formed, and the resistance and inductance in a system and interference factors among chips are reduced. In addition, a complex multi-layer interconnection structure can be formed, so that the wafer system-level packaging of a higher integration level is realized.

Description

technical field [0001] The invention relates to semiconductor technology, in particular to a fan-out high-density packaging method. Background technique [0002] Wafer Level Packaging (WLP) technology is a technology that performs packaging and testing on the entire wafer and then cuts it to obtain a single finished chip. The size of the packaged chip is exactly the same as that of the bare chip. Wafer-level chip-scale packaging technology has completely subverted traditional packaging such as ceramic leadless chip carrier (Ceramic Leadless Chip Carrier) and organic leadless chip carrier (Organic Leadless Chip Carrier), etc. , small, short, thin and low-cost requirements. The size of the chip packaged by the wafer-level chip size packaging technology has reached a high degree of miniaturization, and the cost of the chip is significantly reduced with the reduction of the chip size and the increase of the wafer size. Wafer-level chip-scale packaging technology is a technolog...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/50H01L21/56
CPCH01L2924/10253H01L2924/30107H01L2224/24146H01L24/82H01L2224/16145H01L2224/24195H01L2224/24226H01L2224/32145H01L2224/32225H01L2224/73204H01L2224/73267H01L2224/82005H01L2224/92244H01L2924/15311H01L2924/19105H01L2924/181H01L2224/16225H01L2224/24H01L2924/00H01L2924/00012
Inventor 陶玉娟石磊
Owner NANTONG FUJITSU MICROELECTRONICS
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