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Graphical substrate and light-emitting diode (LED) chip

A graphics substrate and graphics technology, applied in the direction of electrical components, circuits, semiconductor devices, etc., to achieve the effect of improving photoelectric performance, increasing luminous efficiency, and increasing the lateral epitaxy area

Inactive Publication Date: 2011-08-31
INVENLUX OPTOELECTRONICS (CHINA) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0013] 3. Some dislocations may get a chance to terminate at the epitaxial layer-substrate interface in the direction of the pattern protrusion
Moreover, since the upper surface of the graphic protrusion 101 also provides an additional epitaxial surface, when the upper and lower epitaxial layers intersect, it is possible to introduce new defects such as small-angle grain boundaries 233, etc.

Method used

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  • Graphical substrate and light-emitting diode (LED) chip
  • Graphical substrate and light-emitting diode (LED) chip
  • Graphical substrate and light-emitting diode (LED) chip

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0079] Figure 3A It is a schematic diagram of a cross-sectional structure of a graphics substrate provided in Embodiment 1 of the present invention. Such as Figure 3A As shown, the graphics substrate includes a base substrate 10 and pattern bumps 101 arranged in an array form formed on the base substrate 10. The shape of the cross-section of the graphics bump 101 is trapezoidal, and the graphics bump mask 102 covers the graphics. The top surface of the protrusion 101. Figure 3B and Figure 3C It is a schematic structural diagram of the manufacturing process of the graphics substrate provided by Embodiment 1 of the present invention. Such as Figure 3B and Figure 3C As shown, the structure and formation process of each level in this embodiment may specifically be:

[0080] Such as Figure 3B Shown, at first, on the substrate 10 ', deposit one layer of thin film layer corresponding to pattern raised mask 102, then deposit a layer of photoresist, metal (Ni , Au, etc.)...

Embodiment 2

[0083] Figure 4A The schematic diagram of the cross-sectional structure of the graphics substrate provided in Embodiment 2 of the present invention, such as Figure 4A As shown, this includes the basic substrate 10 and the pattern protrusions 101 arranged in an array form on the basic substrate 10. The shape of the cross section of the pattern substrate pattern protrusions 101 is also trapezoidal, and the pattern substrate and the implementation The difference of the graphic substrate provided in Example 1 is that the graphic bump mask 102 covers the entire outer surface of the graphic bump 101 .

[0084] Figure 4B A schematic diagram of the threading dislocation structure during the epitaxy process on the patterned substrate provided by Embodiment 2 of the present invention, as shown in Figure 4BAs shown, the epitaxial layer 20 is grown on the patterned substrate in this embodiment, and there is no direct epitaxial growth on the patterned raised mask 102 because the patt...

Embodiment 3

[0086] Figure 5A The schematic diagram of the cross-sectional structure of the graphics substrate provided in Embodiment 3 of the present invention, such as Figure 5A As shown, this includes a basic substrate 10 and patterned protrusions 101 arranged in an array formed on the basic substrate 10. The difference between the patterned substrate and the patterned substrate provided in Embodiment 2 is that the patterned substrate The shape of the cross section of the graphic protrusion 101 is triangular, and the graphic protrusion mask 102 covers the entire outer surface of the graphic protrusion 101 .

[0087] Figure 5B The schematic diagram of the threading dislocation structure during the epitaxy process on the patterned substrate provided by Embodiment 3 of the present invention, in the process of growing the epitaxial layer 20 on the patterned substrate in this embodiment, the dislocation loop 231 and threading dislocations formed Wrong 232 such as Figure 5B As shown, t...

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PUM

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Abstract

The invention provides a graphical substrate and a light-emitting diode (LED) chip. The graphical substrate comprises a basic substrate, graphical bumps and a graphical bump mask, wherein the graphical bumps are arranged in an array form and formed on the basic substrate; and the graphical bump mask at least covers the tops of the graphical bumps. The LED chip comprises an epitaxial layer, a transparent conductive layer, a connection electrode and the graphical substrate which is provided by the invention, wherein the epitaxial layer and the transparent conductive layer are grown on the graphical substrate sequentially. The graphical substrate and the LED chip which are provided by the invention have the advantages that: a lateral epitaxial region is increased by arrangement of the graphical bump mask, and the light emitting efficiency of the LED chip is improved, so the photoelectric performance of the LED chip is improved.

Description

technical field [0001] The invention relates to the technical field of LED chip structures, in particular to a pattern substrate and an LED chip. Background technique [0002] With the development of semiconductor lighting technology, the white light lumen efficiency of light emitting diodes (Light Emitting Diode, LED for short) has also been greatly improved. [0003] The light of the semiconductor solid LED light source is generated by the solid material itself, and the refractive index n of these materials is greater than 2, which is much higher than the refractive index of air or free space (n=1). Therefore, from the perspective of light emission, the LED light source mainly has the following three losses: [0004] 1. The interface loss caused by the reflection (Fresnel loss) caused by the mismatch of the refractive index at the interface and the existence of loss waves along the interface; [0005] 2. Total reflection in the medium: When a beam of light is incident fr...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L33/20H01L33/22
Inventor 张剑平闫春辉郭文平
Owner INVENLUX OPTOELECTRONICS (CHINA) CO LTD
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