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Data input and output control device and semiconductor storage device system

A storage device, input and output technology, applied in the direction of digital memory information, information storage, static memory, etc., can solve the problems of increased power consumption of error correction circuits, uncorrectable errors, and increased processing time.

Inactive Publication Date: 2011-12-21
THE UNIV OF TOKYO
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, in the above-mentioned data input / output control device, the code length of the error correction code is set as a predetermined length, and the error correction of data is performed using such an error correction code of a predetermined length. Therefore, there is an upper limit to the number of correctable bits. When an error exceeding the upper limit of the number of correctable bits occurs in the stored data, such error cannot be corrected
As a method of correcting more errors, it is conceivable to use an error correction code with a longer code length, but in this case, the processing time required for data encoding and decoding in the error correction circuit increases, and the power consumption of the error correction circuit increases.

Method used

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  • Data input and output control device and semiconductor storage device system
  • Data input and output control device and semiconductor storage device system

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Embodiment Construction

[0054] Next, the best embodiment of the present invention will be explained with examples.

[0055] figure 1 It is a schematic configuration diagram of the configuration of the flash memory system 10 equipped with the data input / output control device as the first embodiment of the present invention. The flash memory system 10 is composed of a flash memory 12 formed by stacking a plurality of silicon chips formed with NAND flash memory and a memory controller 20 that controls the flash memory 12, and a host device 60 (for example, a personal computer) It is communicatively connected, and according to various control signals input from the host device 60, the data input from the host device 60 is stored in the flash memory 12 or the data stored in the flash memory 12 is output to the host device 60. In addition, such flash memory 12 and memory controller 20 are formed on mutually different semiconductor chips.

[0056] The flash memory 12 is configured to include a flash memory cell...

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Abstract

The invention provides a data input / output control device and a semiconductor memory device system. When detected number of errors data Nerror exceeds the upper limit number of errors Nmax, an error correction circuit of a memory controller stores twice as long data length as stored data length for execution Sdata as the data length for execution Sdata in a correction information memory unit, and code length Scref longer than the data length for execution Sdata and detectable more errors than the upper limit number of errors as the code length for execution Scode in the correction information memory unit 32 (step S100 and S110). The error correction circuit encodes input data using BCH code having the stored code length for execution Scode, stored encoded data in a semiconductor memory device, is input data stored in the semiconductor memory device, performs error correction for input data using BCH code, and decode error corrected data.

Description

Technical field [0001] The present invention relates to a data input / output control device and a semiconductor storage device system. In particular, it relates to encoding data input from a host device into a predetermined error correction code and storing it in a nonvolatile semiconductor storage device, and inputting it to the semiconductor storage device The stored data is error-corrected with a predetermined error correction code for the input data, decoded, and output to the host device by a data input / output control device, and a semiconductor storage device system provided with such a data input / output control device. Background technique [0002] Conventionally, as this type of data input and output control device, a device that controls the flash memory in response to a request from the CPU is proposed, which is equipped with an error correction circuit. When the input data is written into the flash memory, it is read in 512 bytes sequentially. The input data is encoded ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/10
CPCG11C7/1006G11C2029/0411G06F11/1068
Inventor 竹内健田中丸周平
Owner THE UNIV OF TOKYO
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