174 results about "Quantum error correction" patented technology

The invention discloses an intelligent equipment management and monitoring method based on the Internet of Things. The method comprises the following steps: S1, collecting and preprocessing equipment state data through a quantum sensor; s2, constructing a quantum sensing network, and dynamically optimizing a network topology structure by using a quantum entanglement technology; s3, mapping the equipment state data into a quantum state, and optimizing time delay and spatial distribution in a data transmission process through quantum superposition and quantum interference technologies; s4, correcting error data in the transmission process by adopting a quantum error correction algorithm, and encrypting the corrected data through a quantum key distribution technology; s5, predicting the state of the equipment, and fusing a prediction result with the encrypted data to form a management instruction; s6, executing the management instruction and adjusting the equipment management strategy; and S7, monitoring the running state of the equipment in real time and updating the management instruction. The method has the advantages of high efficiency, accuracy, safety and high adaptability, and the equipment operation and maintenance efficiency is improved.

The invention discloses a superconducting quantum measurement and control microcontroller and measurement and control system based on an extended instruction set, and relates to the technical field of quantum computing, and the superconducting quantum measurement and control microcontroller comprises a state machine which is used for controlling system operation and managing the execution sequence and state switching of instructions; the assembly line is of a four-step two-stage assembly line structure, a current instruction is sequentially subjected to instruction fetching, decoding, execution and write-back stages, instruction fetching of a next instruction is started to be executed in the write-back stage, and each instruction is completed in three clock periods; the code word transmitting instruction is used for generating a control pulse signal of the superconducting quantum bit; the time sequence control instruction is matched with the time delay module and is used for controlling a time interval in quantum bit operation; the feedback transmitting instruction is used for adjusting the state of the quantum bit in real time according to the feedback signal and supporting quantum error correction; according to the superconducting quantum measurement and control microcontroller and the measurement and control system, efficient and low-delay quantum bit control and real-time feedback are realized.

A method for operating a quantum error correction (QEC) code on a quantum computing system (QCS) is disclosed. The QCS includes a set of qubits and a set of couplers. An indication of a set of dropouts is received. Each dropout corresponds to a qubit that is non-functional or a coupler that is non-functional. The dropouts define a set of non-functional qubits, a set of functional qubits, a set of non-functional couplers, and a set of functional couplers. The QEC code is generated based on a set of heuristics, the set of functional qubits, and the set of functional couplers. The QEC code operates on the functional qubits. Each functional coupler provides a coupling between a pair of functional qubits. A quantum algorithm is executed that includes employing the QEC code to protect a set of logical qubits formed by the first subset of functional qubits from logical errors.

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for detecting errors in computations executed by a quantum computer. In one aspect, a method includes obtaining error correction data for each of a plurality of time steps during the calculation; and processing a respective input for each of a plurality of update time steps using one or more machine learning decoder models to generate a prediction of whether an error has occurred in the computation, where each update time step corresponds to one or more of the time steps, and where each update time step corresponds to one or more of the time steps. The respective input for each of the plurality of updated time steps is generated from the error correction data for the corresponding one or more time steps.

A quantum computing system comprises a classical computing entity, a controller, and a quantum processor. The controller is configured to control operation of the quantum processor and communicate with the computing entity. The controller causes performance of syndrome circuit segments to generate syndromes of logical qubits. The syndrome circuit segment is performed at least partially by causing performance of a sequence of transportation operations and at-least-two-physical-qubits interactions. Each transportation operation of the sequence causes physical transport of at least one of a respective data qubit of the logical qubit or a respective ancilla qubit into a respective interaction zone defined by the quantum processor. A respective at-least-two-physical-qubits interaction is performed within the respective interaction zone. Using the syndrome, at least one quantum error correction is determined; and the controller causes a classical memory to be updated based on the syndrome and / or the quantum error correction.

A decoder apparatus for decoding syndrome data of a quantum error correction code is disclosed. The decoder apparatus is configured to receive position data representing the respective location of defects from the syndrome data in a decoding graph. The decoder apparatus also receives dimension data of the decoding graph and determines the respective location of each of the plurality of defects in the decoding graph based on the position data and the dimension data. The decoder apparatus then decodes the syndrome data using the determined respective location of each of the plurality of defects.

Correcting quantum errors based on quantum error correction caches (QECCs) is disclosed herein. In one example, a processor device of a quantum computing device is to receive an indication of an occurrence of a quantum error that affects a qubit. The processor device identifies a QECC entry within a plurality of QECC entries of a first QECC of the quantum computing device, wherein the QECC entry corresponds to a previous occurrence of the quantum error. The processor device obtains metadata associated with the previous occurrence of the first quantum error from the QECC entry, and determines a corrective action based on the metadata. The processor device performs the corrective action to remedy the quantum error.

A computing system is provided, including one or more processing devices configured to receive an extended stabilizer form of a quantum error correction code. The one or more processing devices are further configured to receive a logical Clifford operation specification of a logical Clifford operation. Based at least in part on the extended stabilizer form, the one or more processing devices are further configured to compute a stabilizer tableau of the quantum error correction code. Based at least in part on the stabilizer tableau and the logical Clifford operation specification, the one or more processing devices are further configured to compute a physical representation matrix of the logical Clifford operation. The one or more processing devices are further configured to output the physical representation matrix.

A method for decoding qubit errors of a quantum computing system that implements a quantum error correction (QEC) code is disclosed. Qubits are subject to a set of error types including a set of non-decomposable error types and a set of decomposable error types. An initial matching graph (MG) is generated based on the non-decomposable error types. The initial MG includes a set of nodes and a set of non-decomposable edges. Non-decomposable edges are associated with non-decomposable error types occurring on qubits. A set of decomposable potential-edges is generated based on the decomposable error types. Decomposable potential-edges are associated with decomposable error types occurring on qubits. An updated MG is generated by applying a local-connectivity test to each decomposable potential-edge. The updated MG includes the set of nodes and a set of updated edges including the set of non-decomposable edges and a set of decomposable edges.

The disclosure is directed to a method performed during an execution of a quantum algorithm, via a quantum computing system (QCS) that includes a set of qubits and a set of classical processor devices. The quantum algorithm includes a quantum error correction (QEC) code that includes a set of qubit measurements over the set of qubits. Prior to the execution of the QA, the classical processor devices generate a matching graph (MG). During the execution of the quantum algorithm, the following operations are interleaved. A current subset of qubit measurements is performed. The qubit measurements are based on the QEC code. The classical processor devices update the MG based on values of the current subset of qubit measurements. The set of classical processor devices decodes one or more qubit errors based on the updated MG.

Disclosed herein is a computer-implemented quantum error correction method for decoding errors in a quantum computer system. The quantum computer system comprises a decoder apparatus and a register of quantum devices. The method comprises receiving, at the decoder apparatus, syndrome data in an initial state, the syndrome data being representative of an error state of the quantum devices in the register of quantum devices, and graph data representative of a graph comprising a plurality of error nodes and a plurality of check nodes. The error nodes represent error mechanisms that can occur on the register of quantum devices. Each check node is associated with one or more measurements which can be performed on the register of quantum devices. The initial state of the syndrome data indicates a check value of marked or unmarked for each check node based on an outcome of its associated one or more measurements. The method further comprises determining, based on a statistical model of error rates associated with the error mechanisms, an error probability associated with each of the one or more error nodes; and generating modified graph data by iteratively performing linear operations on the graph data and syndrome data based on a current state of the syndrome data to determine an independent error node associated with each marked check node. The method also comprises determining, by the decoder apparatus, a correction for the error state based on the modified graph data and, optionally, based on the error probabilities associated with the one or more error nodes.

A method for synthesizing Boolean circuits for an error correction decoder. The method may include: providing one or more input binary variables derived from one or more syndrome measurements; providing a mapping representative of a quantum error correction decoder; for said one or more input binary variables providing corresponding output binary variables representative of one or more recovery operations for qubits, wherein said output binary variables are generated using said mapping; and using said one or more input binary variables and said corresponding output binary variables to synthesize at least one Boolean circuit. A quantum error correction decoder chip comprising one or more Boolean circuits.

Transformer neural network based decoder for decoding Quantum Error Correction Codes (QECC), comprising, an input layer, a plurality of decoding layers, and an output layer. The input layer is adapted to receive initial noise estimation computed by a noise estimator for noise injected to syndrome bits of codewords encoded using QECC and transmitted over transmission channel(s) subject to interference, and create embeddings for the syndrome bits. The decoding layers adapted to compute an estimated logical operator matrix of each codeword, each comprises a self-attention layer constructed according to a mask indicative of a relation between the embeddings derived from a parity-check matrix of the error correction code. The plurality of decoding layers are trained using a combined loss function directed to minimize LER, BER, and error rate of the noise estimator. The output layer is adapted to produce a vector representing predicted soft error of the codeword's logical operator matrix.

A quantum computing system and a method of performing a quantum error correction code are disclosed. A determination is made that a leakage event has occurred at a quantum device. A plurality of decoding hypergraph hyperedges potentially affected by the leakage event are determined. The plurality of decoding hypergraph hyperedges are adjusted in accordance with the leakage event.

A method and apparatus for decoding syndromes of a quantum error correction code is disclosed. The method includes the steps of receiving syndrome data for a plurality of quantum error correction rounds performed on a plurality of qubits; identifying a plurality of first blocks within the syndrome data, wherein each first block has a respective first central block surrounded by one or more respective first buffer blocks; decoding each first block to obtain a first committed correction for each respective first central block; identifying a plurality of second blocks within the syndrome data, wherein each second block comprises at least part of at least one first buffer block; and decoding each second block to obtain a second committed correction for each second block. An apparatus including a plurality of block decoders and a process manager is disclosed.

Methods, systems, and devices for enhancing decoding using in-phase and quadrature information. In one aspect, a method includes obtaining in-phase and quadrature values for multiple measurement operations in a quantum error correction code for quantum computing; classifying the measurement results of the plurality of measurement operations using the corresponding in-phase and quadrature values; generating a detector graph of nodes and edges, wherein the detector graph marks detection events occurring in the classified measurements; assigning weights to the edges of the detector graph using a posterior probability distribution of the classified measurements to generate a weighted detector graph; and performing a decoding process on the weighted detector graph to calculate a decoded output of the decoding process, where the decoded output predicts an occurrence of an error in the quantum computation.

The invention discloses an ultralow-temperature quantum controller applied to a low-temperature superconducting quantum computer, which comprises an analog circuit part and a digital circuit part, and is characterized in that the analog circuit part comprises two XY channels and three Z channels, each XY channel comprises two signal paths and an on-chip balun; each signal path comprises a nonlinear digital-to-analog converter NLDAC, an intermediate-frequency filter, an adjustable gain amplifier VGA, a quadrature mixer and a quadrature local oscillator signal generator, the input end of the quadrature mixer is connected with the output end of the quadrature local oscillator signal generator, and the output ends of the two signal paths of the XY channel generate XY channel control signals of the XY channel through on-chip balun combination. Each of the three Z channels includes three independent, independently adjustable digital-to-analog converters (DACs) for generating Z channel control signals for the three Z channels. The invention aims to shorten the distance between the controller and the quantum chip, improve the fidelity of the quantum computer and reduce the expense of quantum error correction.

A quantum computational method is provided. The quantum computational method includes providing a physical quantum system (100) comprising constituents (50). The quantum computational method includes performing an encoded quantum computation on the physical quantum system. Performing the encoded quantum computation includes preparing at least a portion of the physical quantum system in an initial quantum state. Performing the encoded quantum computation includes evolving at least a portion of the physical quantum system to a final quantum state. Performing the encoded quantum computation includes measuring at least a portion of the physical quantum system to provide a read-out. During at least a portion of the encoded quantum computation, the quantum state of at least a portion of the quantum system is an encoded quantum state corresponding to a quantum error-correction code. The quantum error-correction code is a parity code that encodes logical qubits (10) into code qubits (20). The code qubits include parity qubits, wherein each parity qubit represents the parity of an associated subset of logical qubits. Each code qubit is physically implemented in a corresponding subsystem (50, 350) of the physical quantum system, wherein the subsystem comprises one or more constituents. During a first portion of the encoded quantum computation, the code qubits include a first code qubit duplication set (1350, 1450, 1550, 1651-1653, 1750) associated with a first logical qubit. The first code qubit duplication set includes at least three code qubits, wherein either (a) each code qubit in the first code qubit duplication set is a parity qubit representing the parity of a same first subset of logical qubits that includes the first logical qubit or (b) each code qubit in the first code qubit duplication set is a data qubit representing a quantum state of the first logical qubit. The quantum computational method further includes performing a first sequence of physical quantum operations on the physical quantum system during the first portion of the encoded quantum computation. The first sequence of physical quantum operations acts at least on the subsystems of the physical quantum system corresponding to the code qubits in the first code qubit duplication set. The first sequence of physical quantum operations is an encoded realization, via the parity code, of a first logical quantum operation (501-505, 1310, 1410, 1310, 1510, 1610, 1710, 1810) acting at least on the first logical qubit.

Using a quasi-probabilistic decomposition approach, a technique combining quantum error correction and quantum error mitigation is used to simulate fault-tolerant T-gates with low sampling overhead. In some embodiments, the T-gate can be simulated using two logic bits and magic state preparation that reduces the need for magic state extraction and thus has low sampling overhead. Alternatively, the T-gate can be simulated based on code deformation performed on the surface code. Quasi-probabilistic decomposition is used to remove noise from the T-gate based on learned logical error rates.

The disclosure is directed to a method performed during an execution of a quantum algorithm, via a quantum computing system (QCS) that includes a set of qubits and a set of classical processor devices. The quantum algorithm includes a quantum error correction (QEC) code that includes a set of qubit measurements over the set of qubits. Prior to the execution of the QA, the classical processor devices generate a matching graph (MG). During the execution of the quantum algorithm, the following operations are interleaved. A current subset of qubit measurements is performed. The qubit measurements are based on the QEC code. The classical processor devices update the MG based on values of the current subset of qubit measurements. The set of classical processor devices decodes one or more qubit errors based on the updated MG.

Error-corrected quantum computation using transversal gates and correlated decoding is provided. A first and second logical qubit is encoded into physical qubits according to a quantum error correcting code. Based on the quantum error correcting code, a bipartite decoding graph is constructed corresponding to the first and the second logical qubits, the bipartite decoding graph comprising a plurality of detector nodes and a plurality of error nodes, each error node corresponding to an error mechanism. A transversal gate is applied to the first and the second logical qubits. Syndrome measurement of the first and the second logical qubits is performed. For each of the plurality of detector nodes affected by the corresponding error mechanism of one of the plurality of error nodes, an edge is generated on the bipartite decoding graph therebetween. A physical error configuration is determined from the bipartite decoding graph.

Techniques for quantum error correction are described that utilize dual track coding of a single excitation in a pair of coupled quantum oscillators. The dual track qubit may be implemented in a cQED (Circuit Quantum Electrodynamics) system that includes a pair of coupled resonators. In this dual track coding, the excitation is stored in one of the two resonators. The excitation of the first resonator is regarded as logic 0, while the excitation of the other resonator is regarded as logic 1. Thus, the two resonators together form a single logical dual track qubit with logical states of 0 > L = 01 > and 1 > L = 10 >.

The invention discloses a multi-mode starting automatic control method and system based on a PC Farm array server, and relates to the technical field of server cluster management.The method comprises the steps that a central node creates a fine-grained strategy instruction and a corresponding mirror image instruction according to deployment requirements, and the fine-grained strategy instruction and the corresponding mirror image instruction are compressed into a mirror image compressed package through LZMA; the edge node extracts the verification label from the mirror image compressed package, analyzes the verification label through quantum error correction control, repairs a bit flipping error, and generates an anti-interference standardized instruction stream; based on the anti-interference standardized instruction stream, generating a quantum code stream data block through Hamming code coding, writing the quantum code stream data block into a configuration interface address, and correcting signal deviation to trigger a reset command; and executing the reset command, collecting a BIOS startup log, and comparing the BIOS startup log with pre-stored features to generate a startup state verification report. According to the method, accurate calibration and sequential control of hardware configuration are realized, the accuracy of starting parameters is ensured, and the high efficiency and stability of automatic deployment are improved.

A quantum computing system and a method of performing a quantum error correction code are disclosed. Syndrome data is received representative of an error state of a plurality of quantum devices. Occurrence of a runtime trigger event is determined. A hypergraph modification rule associated with the runtime trigger event is retrieved from a decoding hypergraph modification map data structure comprising a plurality of predefined hypergraph modification rules. A decoding hypergraph is modified in accordance with the hypergraph modification rule to generate a modified decoding hypergraph. A correction for the error state is determined by decoding the syndrome data with the modified decoding hypergraph.

A method (50) of applying a Crifford circuit to a correction fault in a qubit register (12) of a quantum computer (10) includes receiving (52) circuit data defining the Crifford circuit; receiving (56) additional data identifying one or more measurements for each of a plurality of faces (48) belonging to the lattice (44); issuing (58) a result code based on the circuit data, the result code comprising a series of result checks, each result check corresponding to an expected error syndrome for application of the Crifford circuit to the qubit register; and issuing (60) a topology result code based on the circuit data, the additional data and the result code, the topology result code comprising a series of check operators that support quantum error correction via a topology decoder, thereby enabling fault correction in the application of the Crifford circuit to the quantum bit register.

Technologies for performing error correction in a quantum circuit of a quantum computing system are disclosed. A quantum error correction code (QECC) is selected. The QECC is associated with a codespace. The quantum computing system identifies, based on one or more properties of the QECC, one or more diagonal physical gates in the quantum circuit that induces a target logical gate and preserves the codespace. The quantum computing system configures the quantum computing circuit to implement a quantum error correction protocol using the QECC and at least one of the identified diagonal physical gates.

A quantum error correction system that can realize a scheme which, when the quantum system suffers some noise, the quantum system itself can act on itself to correct itself against this noise is provided. The quantum error correction system includes a quantum material and a bi-chromatic recovery drive generator in communication with the quantum material. The bi-chromatic recovery drive generator sends a waveform to the quantum material.

The application discloses a kind of quantum torus code decoder and method, using the self-attention U-net quantum error correction decoder obtained by training to decode torus code.SU‑NetQD is composed of two parts of low-level decoder and high-level decoder.The low-level decoder uses the extracted error syndrome as input and predicts recovery chain operation, and the high-level decoder uses the recovery chain predicted by the low-level decoder and the original error syndrome as input and predicts the logical error introduced by the low-level decoder.The decoder decodes successfully when and only when the recovery chain predicted by the low-level decoder can completely eliminate the error syndrome, and the logical error predicted by the high-level decoder conforms to the combined effect of the recovery chain and the original error.The application can efficiently and quickly implement the denoising function for torus code under complex noise, maintain the original information of quantum bits without interference, and perform better than the traditional MWPM decoder in various situations.