Soc integrated circuit with multiplexing of functional interface and debugging interface

Abstract

The present invention proposes a SOC integrated circuit, including: a functional interface controller, a JTAG debugging interface controller, a signal multiplexing unit for selecting a functional interface signal or a debugging interface signal and transmitting the selected signal to an external interface, and a signal multiplexing unit for Depending on whether the debugging mode trigger instruction is received, the signal multiplexing unit controls the multiplexing control register for signal multiplexing, several pins, and an external interface for connecting with debugging tools or other devices other than the SOC integrated circuit. Through the signal multiplexing unit and the multiplexing control register, all pins of the present invention can be multiplexed for function application and debugging, and can reduce SOC integrated circuit pin consumption and chip area. And the debugging tool can debug the SOC integrated circuit through the external interface, without dismantling the machine and leading the test signal line, and can debug some low-probability abnormal phenomena, and the effect is better.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a SOC integrated circuit. Background technique [0002] SOC (System-On-a-Chip, System on a Chip) refers to the current large-scale integrated circuit, which implements various functions in an integrated circuit chip. Usually, one chip can meet all the needs of the system, so it is called a system on a chip. . With the development of microelectronics technology, the application of SOC has been very extensive, and the scale can be larger and the function can be stronger in the future. [0003] The JTAG (Joint Test Action Group) interface is a debugging interface commonly used in SOC integrated circuits. Through the JTAG interface, the terminal tool on the computer can not only access the internal registers and storage units of the SOC integrated circuit, but also The code can be downloaded to the storage unit of the SOC integrated circuit, so as to control the running process o...

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Problems solved by technology

[0005] The disadvantages of this method are in the following aspects: 1) It takes a long time; 2) Leading the test signal line will bring uncertain factors to the debugging, which will increase the difficulty of debugging; 3) In order to disassemble and lead the test signal line, The power of the machine needs to be turned off, so for some difficult-to-reproduce phenomena, it is impossible to debug these low-probability abnormal phenomena; 4) SOC integrated circuits need special debugging pins, which increase the consumption of SOC integrated circuit pins, which is not conducive to SOC integrated circuits the design of

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