Method and device for dynamically adjusting frequency and voltage of embedded equipment
An embedded device and dynamic adjustment technology, which is applied in the direction of measuring device, data processing power supply, measurement flow/mass flow, etc., can solve the problem that the clock frequency cannot be adjusted accurately
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specific Embodiment 1
[0033] In this embodiment, the clock source of the clock domain 1 of the embedded device is a phase-locked loop (abbreviation, PLL), and there are 5 modules in this clock domain, respectively M1, M2, M3, M4, M5, each module The current clock frequencies are 240Mhz, 60Mhz, 40Mhz, 30Mhz and 24Mhz respectively, and the frequency division coefficients of the clock controllers of each module are Div1=1, Div2=4, Div3=6, Div4=8, Div5=10, and the PLL provides The master clock signal is 240Mhz. The overall process of this embodiment is as follows figure 2 shown.
[0034] 1. The device obtains the working status of each module in real time;
[0035] In this embodiment, the device uses real-time polling to query the clock frequency requirements of each module;
[0036] 2. When the clock frequency required by a module changes, the device adjusts the clock controller and main clock frequency of each module in the clock domain to which the module belongs;
[0037] 201. The clock freque...
specific Embodiment 2
[0056] In this embodiment, the clock source of the clock domain 2 of the embedded device is a phase-locked loop (abbreviation, PLL), and there are 5 modules in this clock domain, respectively M1, M2, M3, M4, M5, wherein, The current clock frequencies of M1~M4 are 120Mhz, 60Mhz, 30Mhz, and 20Mhz respectively, and the frequency division coefficients of the clock controller are Div1=2, Div2=4, Div3=8, Div4=12, M5 is off, and the PLL provides The main clock signal is 240Mhz. The overall process of this embodiment is as follows figure 2 shown.
[0057] 1. The device obtains the required clock frequency of each module in real time;
[0058] In this embodiment, the device obtains the clock frequency required by each module by reporting in real time when the working status of each module changes;
[0059] 2. When the clock frequency required by a module changes, the device adjusts the clock controller and main clock frequency of each module in the clock domain to which the module ...
specific Embodiment 3
[0079] This embodiment is a preferred embodiment of a device for dynamically adjusting the frequency and voltage of an embedded device in the present invention. The structure of the device is as follows image 3 shown, including:
[0080] The module frequency demand acquisition unit obtains the clock frequency required by each module in real time from each module of the device, and sends it to the judgment unit;
[0081] The judging unit compares the required clock frequency of each module provided by the module frequency demand acquisition unit and the clock frequency of each module preserved in the parameter storage unit to judge whether frequency adjustment is required; update the clock frequency of each module preserved in the parameter storage unit, and send The control signal is given to the frequency calculation unit;
[0082] The parameter storage unit saves the clock frequency of each module of the device; the frequency division coefficient of each module correspondi...
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