Semiconductor device and manufacture method thereof

A manufacturing method and semiconductor technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of reducing carrier mobility and unfavorable transistor performance, so as to achieve the effect of optimizing performance and avoiding regrowth

Inactive Publication Date: 2012-02-08
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the above method directly introduces nitrogen element into the side of the high-k dielectric segment as the gate dielectric layer under the gate, which will reduce the carrier mobility in the channel region of the transistor, and then cause adverse effects on the performance of the entire transistor. influences

Method used

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  • Semiconductor device and manufacture method thereof
  • Semiconductor device and manufacture method thereof
  • Semiconductor device and manufacture method thereof

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Embodiment Construction

[0022] The present invention will be further described below in conjunction with specific embodiments and accompanying drawings, but the protection scope of the present invention should not be limited thereby.

[0023] image 3 It is a schematic flowchart of a method for manufacturing a semiconductor device that suppresses horizontal diffusion of oxygen according to the first embodiment of the present invention. Figure 5 to Figure 8 For the first embodiment of the present invention according to image 3 Schematic diagram of the cross-sectional structure of various stages in the process of manufacturing a semiconductor device that suppresses oxygen horizontal diffusion. Combine below image 3 , 5 -8 Describes the first embodiment of the present invention.

[0024] Such as image 3 , 5 -8, the semiconductor device manufacturing method of the first embodiment of the present invention includes:

[0025] Step S201 , providing a semiconductor substrate 301 on which a high-k ...

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Abstract

The invention provides a manufacture method of a semiconductor device. The method comprises the following steps: providing a semiconductor substrate, and forming a high-K dielectric layer and a graphical grid on the semiconductor substrate in order; carrying out nitridation on a part of the high-K dielectric layer which is not covered by the grid on the semiconductor substrate; forming a side wall around the grid. Correspondingly, the invention also provides the semiconductor device. In the invention, the part of the high-K dielectric layer which is not covered by the grid or the side wall on the semiconductor substrate is subjected to nitridation, an oxygen diffusion barrier layer is formed at a surface of the high-K dielectric layer, diffusion of oxygen into the high-K dielectric layer under the grid from a horizontal direction is inhibited, the high-K dielectric layer is protected from oxygen erosion, and work performance of the semiconductor device is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor device and a manufacturing method thereof which inhibit oxygen from diffusing into a high-permittivity (high-k) gate dielectric layer along a horizontal direction. Background technique [0002] As the size of semiconductor devices continues to scale down, especially when the semiconductor manufacturing process enters below the 90nm technology node, the thickness of the gate oxide layer becomes thinner and thinner. However, when the thickness of the gate oxide layer is less than 10 nm, the increase of the gate leakage current caused by the too thin gate oxide layer will have a worsening effect on the performance of the semiconductor device. [0003] In order to increase the thickness of the gate oxide layer of semiconductor devices and suppress the generation of gate leakage current under the trend of proportional reduction in the size of semico...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/28H01L29/51H01L29/78
CPCH01L29/4983H01L29/518H01L29/66477H01L29/78H01L29/40114
Inventor 尹海洲骆志炯朱慧珑
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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