Techniques for non-overlapping clock generation
A clock generation circuit, non-overlapping technology, applied in the direction of pulse technology, pulse generation, electric pulse generation, etc., can solve the problems of multiple currents, consumption of clock effective time, consumption, etc.
Inactive Publication Date: 2014-12-10
QUALCOMM INC
View PDF8 Cites 0 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
The extra non-overlap time and phase delay time in slow corner conditions consumes the active time of the clock and requires faster stabilization of the switched capacitor integrator
Therefore, more current is consumed for the op-transconductance amplifier in the switched capacitor integrator
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0021] The word "exemplary" as used herein means "serving as an example, illustration, or illustration." Any embodiment or design described herein as "exemplary" should not be construed as being more preferred or advantageous over other embodiments or designs.
[0022] Generally, non-overlapping clock signals are used in switched capacitor circuits to minimize errors. FIG. 1 is a schematic diagram of a prior art non-inverting switched capacitor integrator circuit 11 known to those skilled in the art. The switched capacitor integrator circuit 11 includes switches 12, 13, 14, and 15, capacitors CAP1 and CAP2, and an amplifier 16. The switches 12, 13, 14 and 15 receive non-overlapping clock signals C1, C2, C2d (C2-delay) and C1d (C1-delay), respectively.
[0023] In the first stage of operation, switches 13 and 14 are activated to charge the capacitor CAP1 to reach the voltage applied to the input terminal Vin. The switch 14 connects the input terminal Vin to the first terminal of ...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
Login to View More Abstract
Techniques for generating precise non-overlap time and clock phase delay time across a desired frequency range are provided. In one configuration, a device includes a non-overlapping clock generation circuit which comprises a delay lock loop (DLL) circuit that in turn generates a control voltage to a clock generator circuit coupled thereto. The control voltage operates to maintain precise timing relationship of non-overlapping delayed clock signals generated by the clock generator circuit. In one aspect, the DLL circuit receives an input clock with a known duty cycle and derives an output control voltage to fix the unit delay to a certain portion of the input clock cycle. In a further aspect, the clock generator circuit includes a plurality of voltage-controlled delay cells coupled to the DLL circuit to generate a first set of clock signals and a second set of clock signals delayed from the first set of clock signals by a non-overlapping time (tnlp) that is independent of manufacturing process variations.
Description
Technical field [0001] In summary, the present invention relates to the field of clock generation circuits, and in particular, to non-overlapping clock generation circuits. Background technique [0002] Generally, a clock generation circuit is used to time a synchronous digital circuit such as an analog-to-digital converter (ADC). The clock generating circuit provides a repetitive signal with a constant period. In a single clock signal period, the clock signal has a first phase and a second phase. Generally, the clock generating circuit provides an inverted clock signal and a non-inverted clock signal. The clock generation circuit usually also provides a delayed clock signal. [0003] One type of clock signal is a non-overlapping clock signal. Non-overlapping clock signals are usually used in switched capacitor integrator circuits. The non-overlapping clock generation circuit provides a non-inverted clock signal and an inverted clock signal, and the non-inverted clock signal a...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/12H03L7/08H03K3/017
CPCH03K5/1565H03K2005/00286H03M1/12H03K2005/00097H03L7/0812H03K5/1515H03K2005/00039H03K3/017H03L7/08
Inventor X·全T·宋L·马特D·J·阿拉蒂
Owner QUALCOMM INC