N type silicon on insulator transverse insulated gate bipolar device

Abstract

The invention provides an N type silicon on insulator (SOI) transverse insulated gate bipolar device which comprises an N type substrate. A buried oxide is provided on the N type substrate. An N type epitaxial layer is provided on the buried oxide. The N type epitaxial layer is provided with an N type buffer well and a P type body region inside. The N type buffer well is provided with a P type positive area inside. The P type positive area is provided with an N type positive area and a P type body contact area inside. A surface of the N type epitaxial layer is provided with a gate oxide layer and a field oxide layer in a certain scope. An upper surface of the gate oxide layer is provided with a polysilicon gate. A surface of the device is provided with a passivation layer and a metal level in a certain scope. The device is characterized in that: the N type epitaxial layer is provided with a P type well area, the P type well area and the P type body region form steeped P type doping, dosage concentration of the P type well area is lower than dosage concentration of the P type body area, one side of the P type well area is tangent to the field oxide layer, and the other side of the P type well area presses against the P type body area. According to the above structure, electric field intensity and impact ionization rate of a beak position can be substantially reduced, thus an output characteristic is effectively improved.

Description

technical field [0001] The invention mainly relates to the field of high-voltage power semiconductor devices, specifically, an N-type silicon-on-insulator lateral insulated gate bipolar device, which is suitable for driving chips in plasma flat panel display equipment, half-bridge driving circuits, and automobile production fields. Background technique [0002] With the continuous improvement of people's living standards, electronic products continue to put forward new requirements for volume, performance, reliability and cost. In this situation, Silicon On Insulator (SOI) process technology came out. Its unique insulating buried layer completely isolates the device from the substrate, reduces the influence of the substrate on the device, and eliminates the latch-up effect of the device. (1atch-up) risk, to a large extent alleviates the parasitic effect of silicon devices, greatly improving the performance of devices and circuits. Therefore, the circuit made by SOI process ...

AI Technical Summary

Problems solved by technology

At the same time, the output characteristic curve of high-voltage devices is more likely to deviate from ideal conditions than low-voltage devices

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