MOSFET (metal-oxide-semiconductor field effect transistor) and manufacturing method thereof

Abstract

The invention discloses an MOSFET (metal-oxide-semiconductor field effect transistor) and a manufacturing method thereof. The MOSFET comprises an SOI (silicon-on-insulator) wafer, a source region, a drain region, a channel region and a gate stack, wherein the SOI wafer comprises a bottom semiconductor substrate, a first oxide buried layer and a first semiconductor layer; the source region and the drain region are formed in a second semiconductor layer above the SOI wafer, and the second semiconductor layer and the SOI wafer are separated by a second oxide buried layer; the channel region is formed in the second semiconductor layer and is arranged between the source region and the drain region; and the gate stack comprises a gate dielectric layer and a gate conductor which are positioned on the second semiconductor layer. The MOSFET also comprises back gates formed in the first semiconductor layer and positioned below a channel, wherein the back gates have uneven doping distribution; and the second oxide buried layer serves as the gate dielectric layer of the back gates. The MOSFET has the following beneficial effects: adjustment of the threshold voltage can be achieved by changing the doping types and / or doping distribution in the back gates; and the leakage current between the source region and the drain region is reduced.

Description

technical field [0001] The present invention relates to a MOSFET and a manufacturing method thereof, more particularly, to a MOSFET with a back gate and a manufacturing method thereof. Background technique [0002] An important development direction of integrated circuit technology is to scale down the size of metal-oxide-semiconductor field-effect transistors (MOSFETs) to improve integration and reduce manufacturing costs. However, it is well known that short-channel effects occur as the size of MOSFETs decreases. As the size of the MOSFET is scaled down, the effective length of the gate is reduced, so that the proportion of depletion layer charge that is actually controlled by the gate voltage is reduced, so that the threshold voltage decreases as the channel length decreases. [0003] In MOSFET, on the one hand, it is desired to increase the threshold voltage of the device to suppress the short channel effect, on the other hand, it may also be desirable to reduce the thr...

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Problems solved by technology

[0006] However, the aforementioned SOI MOSFETs with grounded back gates are still unable to meet the threshold voltage requirements of the device in the case of ever-decreasing channel lengths.

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