Unlock instant, AI-driven research and patent intelligence for your innovation.

Thin-film transistor applied to three-dimensional on-chip integration system and manufacturing method of thin film transistor

An on-chip integrated system, thin film transistor technology, applied in transistors, semiconductor/solid-state device manufacturing, electric solid-state devices, etc., can solve problems such as limiting system performance, and achieve the effect of reducing costs and enhancing functions

Active Publication Date: 2012-06-06
ZHEJIANG JUEXIN MICROELECTRONICS CO LTD
View PDF5 Cites 6 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Compared with SIP, the performance of 3D IC has been improved, but there are great challenges to substrate thinning, mainly because the actual process is difficult to thin down to a size below 10 μm, which limits the further improvement of system performance

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Thin-film transistor applied to three-dimensional on-chip integration system and manufacturing method of thin film transistor
  • Thin-film transistor applied to three-dimensional on-chip integration system and manufacturing method of thin film transistor
  • Thin-film transistor applied to three-dimensional on-chip integration system and manufacturing method of thin film transistor

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0068] It can be seen from the background art that integrated circuits or integrated circuit systems have been seeking to reduce costs, reduce power consumption, enhance functions, and increase density. At present, the low-temperature deposition technology of low-temperature amorphous / polycrystalline germanium and silicon-germanium materials on semiconductors, dielectrics, and metals is applied to MEMS technology that is fully compatible with CMOS. At the same time, the low-temperature activation of doped germanium and germanium-silicon materials can also be fully compatible with CMOS technology. At the same time, the realization of the deposition and activation of low-temperature silicon-germanium materials makes it possible for the silicon-germanium TFT technology suitable for three-dimensional SOC systems. Therefore, based on the low-temperature deposition and low-temperature activation characteristics of germanium and germanium-silicon amorphous / polycrystalline, the presen...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a thin-film transistor applied to a three-dimensional on-chip integration system and a manufacturing method of the thin film transistor. The thin-film transistor is positioned on a semiconductor structure; the semiconductor structure comprises a semiconductor substrate, a semiconductor device layer and at least one layer of local / global interconnection metal layer, wherein the semiconductor device layer is formed on the semiconductor substrate; the local / global interconnection metal layer is positioned on the semiconductor device layer; and the thin-film transistor comprises a grid electrode, a source electrode and a drain electrode which are made of semiconductor materials. According to the invention, the cost of an SOC (System On a Chip) can be reduced and the function of the SOC can be enhanced.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a TFT (thin-film-transistor, thin-film-transistor) applied to a three-dimensional SOC (system on chip, integrated system on chip) and a manufacturing method thereof. Background technique [0002] With the rapid development and wide application of information technology and semiconductor technology, since the invention of integrated circuit technology, it has been developing in the direction of improving device system performance and reducing unit function cost. As stated by Moore's Law, the size of integrated circuit chips doubles every 1.5 years, while the area of ​​individual basic devices decreases to 1 / 2 of its original size. The basic devices of integrated circuits can be divided into active devices and passive devices. Active devices mainly include MOS (metal-oxide-semiconductor) devices, bipolar devices and the most basic diodes, and passive devices ma...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L29/786H01L27/04H01L21/336H01L21/8232H01L21/76H01L21/768H01L21/60H01L21/50
CPCH01L2924/0002H01L2924/00
Inventor 王志玮唐德明
Owner ZHEJIANG JUEXIN MICROELECTRONICS CO LTD
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com