Pretreatment method for SiGe selective epitaxial growth

An epitaxial growth and selective technology, which is applied in the fields of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of reducing the critical dimension of sidewalls, affecting the performance of key devices, etching silicon nitride sidewalls, etc., and achieving improved strain effect, improve quality, simple and easy process
CN102496574AInactive Publication Date: 2012-06-13SHANGHAI HUALI MICROELECTRONICS CORP
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Patent Information

Authority / Receiving Office
CN ยท China
Current Assignee / Owner
SHANGHAI HUALI MICROELECTRONICS CORP
Publication Date
2012-06-13
Estimated Expiration
Not applicable ยท inactive patent

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Abstract

The invention provides a pretreatment method for SiGe selective epitaxial growth. The method comprises the following steps that: hydrogen plasma is introduced into a device in a reaction cavity; chemical reaction is carried out on a native oxide on the device and the hydrogen plasma and then steam is generated and is volatilized; and SiGe selective epitaxial growth is carried out on source / drain regions of the device. According to the above-mentioned technical scheme, etching on a side wall by the plasma during the pretreatment process can be avoided, so that the quality of SiGe film growth can be improved.
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Description

technical field

[0001] The invention belongs to the field of semiconductor integrated circuit manufacturing, and in particular relates to a pretreatment method before selective epitaxial growth of germanium and silicon, so as to avoid etching of side walls by plasma during the pretreatment process and improve the growth quality of germanium and silicon thin films. Background technique

[0002] As the integration process technology enters the deep submicron process conditions, the conventional shrinking method encounters a series of problems centered on the short channel effect. For example, when the device is further scaled, the improvement of the mobility becomes the key to maintain the performance of the transistor as the current density increases. In recent years, since strain engineering technology (Strain Engineering) can be used in 45nm and below processes, by introducing local unidirectional tensile or compressive stress into the channel of MOSFET in the source / drain ...

Claims

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