5 results about "Strain engineering" patented technology

Technologies for strain engineering in gate-all-around (GAA) field-effect transistors (FETs) are disclosed. In an illustrative embodiment, the source / drain contacts for N-type metal-oxide-semiconductor (NMOS) FETs extend deeper into the source / drain regions than the source / drain contacts for P-type metal-oxide-semiconductor (PMOS) FETs. The source / drain contacts for the NMOS FETs may cause a tensile strain in the channel of the NMOS FETs, while the source / drain region of the PMOS FETS may cause a compressive strain in the channel of the PMOS FETs. The tensile and compressive strains on the NMOS and PMOS channels, respectively, can increase the speed of the NMOS and PMOS transistors.

This invention discloses a heteroepitaxial composite substrate with in-situ thermo-mechanical coupling suppression characteristics and its fabrication method. The substrate is prepared by continuously growing lattice-coherent stress-relieving, compositional equilibrium, and pre-stress compensation sections on a single-crystal silicon support substrate using vapor phase epitaxy. Through the synergistic effect of a step-decreasing germanium composition and a pulsed fluctuating carbon composition, an asymmetric strain field is constructed in-situ within the single-crystal lattice. Cyclic thermal annealing during fabrication enables deep pinning of penetrating dislocations and precise arrangement of the micro-strain trap array. This invention not only solves the inherent lattice constant mismatch problem in heteroepitaxial growth but also ensures extremely high single-crystal quality and structural integrity of the top epitaxial layer through in-situ strain engineering, achieving dynamic stress balance within the material system over a wide temperature range.

The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a preparation method thereof, and the semiconductor device comprises a first channel, a dielectric isolation layer and a second channel which are sequentially stacked; the dielectric isolation layer comprises a first stress layer, an isolation layer and a second stress layer which are stacked in sequence; the first stress layer is adjacent to the first channel. According to the semiconductor device, stress can be applied to the upper channel region and the lower channel region, and independent stress regulation and control can be carried out, so that collaborative optimization of carrier mobility can be realized, and the strain engineering problem in an advanced node strain silicon complementary field effect transistor device can be effectively solved.

Some embodiments may include a laser diode having a strain-engineered cladding layer for optimized active region strain and improved laser diode performance. In one embodiment, the laser diode may include a semiconductor substrate having a material composition with a first lattice constant; and a plurality of epitaxy layers form on the semiconductor substrate, with plurality of epitaxy layers including a waveguide layer and cladding layers, wherein the waveguide layer includes an active region having a material composition associated with a target optical wavelength, wherein a second lattice constant of the material composition of the active region is different than the first lattice constant; wherein a material composition and / or thickness of an individual cladding layer of the cladding layers is / are arranged to impart a target stress field on the active region to optimize active region strain. Other embodiments may be disclosed and / or claimed.

The invention discloses a two-dimensional gallium nitride band gap regulation and control method based on strain engineering, and the method comprises the following steps: fixing a single-layer two-dimensional gallium nitride sample on a flexible substrate, guaranteeing that the sample is flat and free of wrinkles, applying uniaxial tensile strain to the single-layer two-dimensional gallium nitride in the direction of an armchair, only 0.10 low uniaxial tensile strain is applied in the armchair direction, so that the valence band top of the two-dimensional gallium nitride can be migrated to the gamma point from the K point of the Brillouin region, the valence band top and the conduction band bottom are located at the gamma point, conversion from an indirect band gap to a direct band gap is completed, and the two-dimensional gallium nitride can be applied to the armchair. Phonons do not need to participate in electron transition under a direct band gap structure, the energy loss is greatly reduced, the photoelectron transition efficiency is remarkably improved, the problem of low light emission efficiency caused by indirect band gaps of existing two-dimensional gallium nitride is fundamentally solved, and a foundation is laid for preparation of efficient ultraviolet electronic devices.