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Three-dimensional system-in-package package-on-package structure

A system-level packaging and packaging structure technology, applied in the direction of semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., can solve the problems of insufficient ability to increase circuit density, increase the packaging area of ​​packaging thickness, etc., to shorten the production time, process Fully automated, easy-to-use effects

Active Publication Date: 2012-07-11
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Unfortunately, leadframe-based 3D packaging appears to be insufficient in its ability to handle the increasing circuit density demands of high-level functionally integrated systems
In general, lead frame packaging has its limitations due to factors such as increased package thickness, larger package area, and insufficient I / O leads to handle higher circuit densities

Method used

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  • Three-dimensional system-in-package package-on-package structure
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  • Three-dimensional system-in-package package-on-package structure

Examples

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Embodiment Construction

[0054]The present invention will be described in detail below in conjunction with its preferred embodiments and accompanying drawings. It should be understood that all the preferred embodiments in the present invention are for illustration only, not for limitation. Therefore, in addition to the preferred embodiments herein, the present invention can also be widely applied in other embodiments. And the protection scope of the present invention is not limited by any embodiment, but should be determined by the claims and their equivalent fields.

[0055] The present invention proposes a novel three-dimensional system-in-package stacked package structure to reduce package thickness and area, and provide better board-level thermal cycle reliability test.

[0056] figure 1 A cross-sectional view showing a basic 3D system-in-package stacked package structure according to an embodiment of the present invention. Such as figure 1 As shown, the three-dimensional system-in-package sta...

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PUM

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Abstract

The present invention provides a three-dimensional System-In-Package (SIP) Package-On-Package (POP) structure comprising a support element formed around a first electronic device. A filling material is filled between the first electronic device and the support element. Signal channels are coupled to first die pads of the first electronic device. Conductive elements form signal connection between the first end of the signal channels and the second die pads of a second electronic device.

Description

technical field [0001] The invention relates to a packaging structure, in particular to a three-dimensional system-in-package stacking packaging structure. Background technique [0002] In the field of semiconductor devices, device density continues to increase and device size continues to decrease. Therefore, such high-density packaging technology and interconnection technology are also improved to apply the above-mentioned conditions. In the traditional flip-chip structure, the array of solder balls is formed on the surface of the die, and the desired pattern is formed through the traditional solder paste and the solder ball mask. Chip packaging functions include heat dissipation, signal transmission, power distribution, protection, etc. When the chip is more complex, traditional packaging such as lead frame packaging, flexible packaging, and rigid packaging technology cannot meet the needs of high-density and small-size chips. [0003] Furthermore, semiconductor compone...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/28H01L23/495H01L23/485
CPCH01L2924/09701H01L23/562H01L2224/04105H01L2924/19107H01L24/29H01L2224/73265H01L24/96H01L2224/32225H01L25/0657H01L24/14H01L2224/73207H01L2225/06527H01L2224/48091H01L24/05H01L24/19H01L2224/04042H01L2224/1403H01L23/49816H01L2224/05548H01L2224/05569H01L23/5389H01L24/48H01L24/16H01L2225/0651H01L2223/54486H01L2224/29147H01L2924/15321H01L2924/14H01L2924/15311H01L2924/10253H01L24/73H01L24/13H01L2224/02311H01L2224/73204H01L2224/2919H01L2224/131H01L2223/54433H01L2224/0401H01L2924/01029H01L2224/16145H01L24/20H01L2225/06513H01L24/32H01L2224/48227H01L23/3128H01L2924/3025H01L2224/12105H01L23/49827H01L2924/00014H01L2224/73267H01L2924/18162H01L2924/351H01L2924/181H01L2224/16227H01L2924/00012H01L2924/014H01L2924/00H01L2224/05552H01L2224/45099H01L2224/45015H01L2924/207H01L2224/16225
Inventor 林南君郑雅云
Owner TAIWAN SEMICON MFG CO LTD
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